Abstract
In embedded systems and operating systems, the interrupt mechanism is an important way to ensure real-time response to kinds of asynchronous events. While the interrupt mechanism changes the execution traces of the main program, it makes modeling and verification of systems with interrupt difficulty. Therefore, we propose an approach to modeling and verifying multi-level interrupt systems. Firstly, the model of multi-level interrupt systems based on Time Projection Temporal Logic (TPTL) is proposed. On this basis, the model can be used to extend the TMSVL language and the TMSVL interpreter so that multi-level interrupt systems can be modeled, simulated and verified automatically. Finally, a case study is given to show the correctness and practicability of the proposed approach.
This research is supported by the NSFC Grant Nos. 61806158, 413619001, China Postdoctoral Science Foundation Nos. 2019T120881 and 2018M643585, and PhD research funding No. 134010012.
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Cui, J., Lu, X., Liang, B. (2020). An Approach to Modeling and Verifying Multi-level Interrupt Systems with TMSVL. In: Miao, H., Tian, C., Liu, S., Duan, Z. (eds) Structured Object-Oriented Formal Language and Method. SOFL+MSVL 2019. Lecture Notes in Computer Science(), vol 12028. Springer, Cham. https://doi.org/10.1007/978-3-030-41418-4_5
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