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A Fine-Granularity Image Pyramid Accelerator for Embedded Processors

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Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2020)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 12471))

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Abstract

Image-pyramid generator is an important component for many computer vision applications. Due to the complexity of image scaling operations, embedded application processors usually generate three- or four-level image pyramids for vision applications. In this paper, we present an image pyramid accelerator for embedded processors that generates image pyramids of up to 24-levels of down-sampled resolutions for the input image. Since image pyramids are crucial for the coarse-to-fine analysis of many computer vision problems, more resolution levels in the image pyramid can improve the parameter-estimation accuracy. Furthermore, the down-sampling filters used in the proposed design is based on a long-tap Sine-windowed Sinc function filter. Therefore, it preserves more image details than other low-complexity filters such as the bilinear or the bicubic interpolation filter. The proposed circuit is verified on an FPGA development board with a Xilinx Kintex-7 device and will be made open-source. The experimental results show that the design is very promising for real-time computer vision applications.

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Notes

  1. 1.

    See https://github.com/eisl-nctu/pyramid.

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Correspondence to Chun-Jen Tsai .

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Tsai, CJ., Wang, CY. (2020). A Fine-Granularity Image Pyramid Accelerator for Embedded Processors. In: Orailoglu, A., Jung, M., Reichenbach, M. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2020. Lecture Notes in Computer Science(), vol 12471. Springer, Cham. https://doi.org/10.1007/978-3-030-60939-9_6

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  • DOI: https://doi.org/10.1007/978-3-030-60939-9_6

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-60938-2

  • Online ISBN: 978-3-030-60939-9

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