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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 12477))

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Abstract

We propose a methodology for verifying specifications written in AbC, a process calculus for collective systems with a novel communication mechanism relying on predicates over attributes exposed by the components. We emulate the execution of AbC actions and the operators that compose them as programs where guarded sequential functions are non-deterministically invoked; specifically, we translate AbC specifications into sequential C programs. This enables us to use state-of-the-art bounded model checkers for verifying properties of AbC systems. To vindicate our approach, we consider different case studies from different areas and model them as AbC systems, then we translate these AbC specifications into C and instrument the resulting program for verification, finally we perform actual verification of properties of interest.

This work is partially funded by MIUR project PRIN 2017FTXR7S IT MATTERS (Methods and Tools for Trustworthy Smart Systems).

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Notes

  1. 1.

    http://www.cprover.org/cbmc/.

  2. 2.

    https://github.com/esbmc/esbmc/releases/tag/v6.2.

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Correspondence to Rocco De Nicola or Tan Duong .

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De Nicola, R., Duong, T., Inverso, O. (2020). Verifying AbC Specifications via Emulation. In: Margaria, T., Steffen, B. (eds) Leveraging Applications of Formal Methods, Verification and Validation: Engineering Principles. ISoLA 2020. Lecture Notes in Computer Science(), vol 12477. Springer, Cham. https://doi.org/10.1007/978-3-030-61470-6_16

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  • DOI: https://doi.org/10.1007/978-3-030-61470-6_16

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