An Efficient Implementation of AES on 8-Bit AVR-Based Sensor Nodes

Abstract

Recently, FACE-LIGHT was proposed on 8-bit AVR MCUs for fast AES encryption. FACE-LIGHT is an extended version of Fast AES-CTR mode Encryption (FACE) method which was firstly proposed for high-end processors and it is tailored for performance on 8-bit AVR MCUs. Even though it has achieved high performance, it has to suffer from the overhead caused by table generation. Thus, when the number of blocks is less than a certain number, the table generation overhead is greater than the gains from using the generated table in the process of encryption. In other words, FACE-LIGHT needs to generate new tables whenever the Initial Vector (IV) is changed. Thus, frequent table regeneration results in a significant performance degradation. In this paper, we present an efficient implementation of AES block cipher on 8-bit AVR Microcontrollers (MCUs). Our method combines ShiftRows, SubBytes, and MixColumns operations into one with column-wise fashion and makes full use of registers of AVR MCUs for high performance. With handcrafted assembly codes, our implementation has achieved 2,251, 2,706, and 3,160 clock cycles for 128-bit, 192-bit, and 256-bit security, respectively. Our implementation outperforms FACE-LIGHT with respect to overall performance including table generation and block encryptions until around 1,850 blocks (resp. 15,000 blocks) for 128-bit (resp. 192-bit) security. With respect to 256-bit security, our implementation always outperforms FACE-LIGHT without considering the table generation time. Our implementation operates in constant time and can be used for not only CTR mode, but also CBC mode differently from FACE-LIGHT.

This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2019R1F1A1058494).