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LLVM-Based Circuit Compilation for Practical Secure Computation

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Applied Cryptography and Network Security (ACNS 2021)

Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 12727))

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Abstract

Multi-party computation (MPC) allows two or more parties to jointly and securely compute functions over private inputs. Cryptographic protocols that realize MPC require functions to be expressed as Boolean or arithmetic circuits. Deriving such circuits is either done manually, or with hardware synthesis tools and specialized MPC compilers. Unfortunately, such existing tools compile only from a single front-end language and neglect decades of research for optimizing regular compilers.

In this paper, we make MPC practical for developers by automating circuit compilation based on the compiler toolchain LLVM. For this, we develop an LLVM optimizer suite consisting of multiple transform passes that operate on the LLVM intermediate representation (IR) and gradually lower functions to circuit level. Our approach supports various front-end languages (currently C, C++, and Fortran) and takes advantage of powerful source code optimizations built into LLVM. We furthermore make sure to produce circuits that are optimized for MPC, and even offer fully automated post-processing for efficient post-quantum MPC.

We empirically measure the quality of our compilation results and compare them to the state-of-the-art specialized MPC compiler HyCC (Büscher et al. CCS’2018). For all benchmarked HyCC example applications (e.g., biomatch and linear equation solving), our highly generalizable approach achieves similar quality in terms of gate count and composition.

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Acknowledgment

We thank the anonymous reviewers for their helpful comments. This project was co-funded by the Deutsche Forschungsgemeinschaft (DFG) – SFB 1119 CROSSING/236615297 and GRK 2050 Privacy & Trust/251805230, and by the German Federal Ministry of Education and Research and the Hessian Ministry of Higher Education, Research, Science and the Arts within their joint support of the National Research Center for Applied Cybersecurity ATHENE. It has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation program (grant agreement No. 850990 PSOTI).

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Authors and Affiliations

  1. Technical University of Darmstadt, Darmstadt, Germany

    Tim Heldmann, Thomas Schneider, Oleksandr Tkachenko, Christian Weinert & Hossein Yalame

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  1. Tim Heldmann
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  2. Thomas Schneider
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  3. Oleksandr Tkachenko
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  4. Christian Weinert
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  5. Hossein Yalame
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Corresponding author

Correspondence to Christian Weinert .

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Editors and Affiliations

  1. Waseda University, Tokyo, Japan

    Kazue Sako

  2. CISPA Helmholtz Center for Information Security, Saarbrücken, Germany

    Nils Ole Tippenhauer

Appendices

A Optimized Building Blocks

We provide details of the building blocks used by our LLVM toolchain during the gateify pass (cf. Sect. 4.3). To obtain these building blocks, we utilize logic synthesis tools [1, 57, 62] with our custom technology libraries (cf. Sect. 5.2) to optimize (multiplicative) size and restrict the types of basic gates. The most common building blocks are addition, subtraction, multiplication, and (integer) division, multiplexer for array accesses, and comparator, which we detail in the following. Table 5 shows a summary of the circuit size complexities, i.e., the number of non-linear (AND) gates. Moreover, we show the actual circuit sizes for standard 32 bit integers generated by the synthesis tool.

Table 5. Multiplicative complexity of building blocks for bit length l. Concrete sizes for \(l = 32\) as used in Sect. 4.3.
Full size table

Addition/Subtraction. To perform addition of two l-bit values, the traditional ripple carry adder (RCA), in which the carry out of one stage is fed directly to the carry-in of the next stage, has a multiplicative size of \(l-1\) [10, 34]. The subtractor can be viewed as a special case of adder as the subtraction of two values a and b can be represented as \(a -\bar{b} + 1\) where \(\bar{b}\) denotes the two’s complement representation of b.

Multiplication. In classic logic synthesis, a multiplier outputs a 2l-bit product of two l-bit inputs. The best approach for this multiplier is the textbook method with the size of \(2l^2-l\) [34]. However, in many programming languages and MPC protocols, multiplication is defined as a \(l\rightarrow l\) operation, where the product of two l unsigned integers is l-bit. Generating a \(l \rightarrow l\) multiplication with logic synthesis tools give us a circuit size of \(l^2-l\) [27, 44].

Division. The division operation computes the quotient and remainder of two binary integer numbers. The standard approach for the division is similar to the text-book multiplication, where the divisor is iteratively shifted and subtracted from the remainder. By doing so, one division operation can be built with complexity of \(2l^2\) AND gates. Restoring division can help us in hardware synthesis to have a complexity of \(l^2+2l+1\) [51].

Multiplexer. A 2-to-1 MUX was proposed in [35] with a size of l. The tree architecture for an m-to-1 MUX has size \((m-1)l\).

Comparator. The standard comparator circuit checks whether one l-bit number is greater than another with a size of l. We implement this comparator as described in [35].

B Dummy Application

In Listing 1 we provide the C++ code for our dummy application that we use for benchmark purposes in addition to applications from the HyCC repository (cf. Sect. 6.2). It showcases as many supported features as short as possible.

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Heldmann, T., Schneider, T., Tkachenko, O., Weinert, C., Yalame, H. (2021). LLVM-Based Circuit Compilation for Practical Secure Computation. In: Sako, K., Tippenhauer, N.O. (eds) Applied Cryptography and Network Security. ACNS 2021. Lecture Notes in Computer Science(), vol 12727. Springer, Cham. https://doi.org/10.1007/978-3-030-78375-4_5

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