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Approximate Multiplier Design for Energy Efficiency: From Circuit to Algorithm

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Approximate Computing

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Abstract

Due to the inherent tolerance to inaccuracy in data-driven applications, approximate multipliers have received growing attentions for its compactness and energy efficiency. However, the energy efficiency of an approximate multiplier largely depends on how and where the inaccuracy is introduced into the design, which can be roughly categorized to 3 design levels: (1) architecture, (2) algorithm, and (3) circuit. Such large design space inevitably incurs design complexities and challenges in selecting the appropriate multiplier for a particular application. Thus, this paper provides a comprehensive review of the state-of-the-art (SOTA) designs of approximate multipliers for future investigations.

This work was partially supported by National Key R&D Program of China (Grant No. 2018YFE0126300) and National Natural Science Foundation of China (Grant No. 62034007 and 61974133).

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Authors and Affiliations

  1. College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China

    Ying Wu, Chenyi Wen, Xunzhao Yin & Cheng Zhuo

  2. College of Electrical Engineering, Zhejiang University, Hangzhou, China

    Chuangtao Chen

  3. University of Michigan-Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University, Shanghai, China

    Weikang Qian

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  1. Ying Wu
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  2. Chuangtao Chen
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  3. Chenyi Wen
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  4. Weikang Qian
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  5. Xunzhao Yin
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Correspondence to Cheng Zhuo .

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Editors and Affiliations

  1. Nanjing University of Aeronautics and Astronautics, Nanjing, China

    Weiqiang Liu

  2. Northeastern University, Boston, MA, USA

    Fabrizio Lombardi

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Wu, Y., Chen, C., Wen, C., Qian, W., Yin, X., Zhuo, C. (2022). Approximate Multiplier Design for Energy Efficiency: From Circuit to Algorithm. In: Liu, W., Lombardi, F. (eds) Approximate Computing. Springer, Cham. https://doi.org/10.1007/978-3-030-98347-5_3

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  • DOI: https://doi.org/10.1007/978-3-030-98347-5_3

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