Abstract
Approximate computing is a design paradigm for error-tolerant applications. By relaxing the accuracy requirement, it can significantly reduce circuit area and power consumption. There are many approximate logic synthesis (ALS) methods, but few of them target at FPGA designs. In this work, we propose an ALS method for FPGAs based on decomposition. It resynthesizes some fanout-free cones in an FPGA with the minimum numbers of lookup tables through the proposed approximate decomposition techniques. The experimental results showed that our method reduces more LUT count than the previous state-of-the-art ALS methods for FPGAs.
This work was supported by the State Key Laboratory of ASIC & System Open Research Grant 2019KF004. Zhiyuan Xiang and Niyiqiu Liu contributed equally.
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Notes
- 1.
With only two 3-LUTs, we can only realize a function with no more than 5 inputs.
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Xiang, Z., Liu, N., Yao, Y., Yang, F., Zhuo, C., Qian, W. (2022). Approximate Logic Synthesis for FPGA by Decomposition. In: Liu, W., Lombardi, F. (eds) Approximate Computing. Springer, Cham. https://doi.org/10.1007/978-3-030-98347-5_7
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