Abstract
This chapter deals with optimization techniques for the approximate realization of high-level description of input applications. It includes a study and analysis of different design space exploration (DSE) methodologies, which find approximate realization of an input application subject to given design constraints. First, we very briefly review background and concepts related to power consumption calculation, approximate computing (AC) techniques and DSE methodologies, approximate high-level synthesis (HLS), and evaluation metrics for AC. Next, we explain and compare prior works in this field with emphasis on approximation methods used in an exact design and the DSE methodologies.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Kouzes RT, Anderson GA, Elbert ST, Gorton I, Gracio DK. The changing paradigm of data-intensive computing. Computer. 2009;42(1):26–34. https://doi.org/10.1109/MC.2009.26.
Mittal S. A survey of techniques for approximate computing. ACM Comput Surv. 2016;48(4):62:1–62:33.
Sidiroglou-Douskos, et al. Managing performance vs. accuracy tradeoffs with loop perforation. In: Proceedings of ACM SIGSOFT symposium and European conference on foundations of software engineering (ESEC/FSE); 2011. p. 124–34.
Kamal M, Ghasemazar A, Afzali-Kusha A, Pedram M. Improving efficiency of extensible processors by using approximate custom instructions. In: 2014 design, automation & test in Europe conference & exhibition (DATE); 2014. p. 1–4. https://doi.org/10.7873/DATE.2014.238.
Jiang H, Liu C, Liu L, Lombardi F, Han J. A review, classification, and comparative evaluation of approximate arithmetic circuits. J Emerg Technol Comput Syst. 2017;13(4):Article 60, 34 pages. https://doi.org/10.1145/3094124
Sengupta D, Snigdha FS, Jiang H, Sapatnekar SS. SABER: Selection of approximate bits for the design of error tolerant circuits. In: 2017 54th ACM/EDAC/IEEE design automation conference (DAC); 2017. p. 1–6. https://doi.org/10.1145/3061639.3062314.
Amanollahi S, Kamal M, Afzali-Kusha A, Pedram M. Circuit-level techniques for logic and memory blocks in approximate computing systems. Proc IEEE. 2020;108:2150–77. https://doi.org/10.1109/JPROC.2020.3020792.
Nepal K, Hashemi S, Tann H, Bahar RI, Reda S. Automated high-level generation of low-power approximate computing circuits. IEEE Trans Emerg Top Comput. 2019;7(1):18–30. https://doi.org/10.1109/TETC.2016.2598283.
Zendegani R, Kamal M, Fayyazi A, Afzali-Kusha A, Safari S, Pedram M. SEERAD: A high speed yet energy-efficient rounding-based approximate divider. In: 2016 design, automation & Test in Europe conference & exhibition (DATE); 2016. p. 1481–4.
Nakhaee F, Kamal M, Afzali-Kusha A, Pedram M, Fakhraie SM, Dorosti H. Lifetime improvement by exploiting aggressive voltage scaling during runtime of error-resilient applications. In: Proc. Integr, vol. 61; 2018. p. 29–38.
Kashfi F, Hatami S, Pedram M. Multi-objective optimization techniques for VLSI circuits. In: 2011 12th international symposium on quality electronic design; 2011. p. 1–8. https://doi.org/10.1109/ISQED.2011.5770720.
Miettinen K. Nonlinear multiobjective optimization. Netherlands: Springer US; 1999.
Coussy P, Gajski DD, Meredith M, Takach A. An introduction to high-level synthesis. IEEE Des Test Comput. 2009;26(4):8–17. https://doi.org/10.1109/MDT.2009.69.
Hara Y, Tomiyama H, Honda S, Takada H, Ishii K. CHStone: a benchmark program suite for practical c-based high-level synthesis. In: Proceedings of the 2008 IEEE international symposium on circuits and systems. IEEE; 2008. p. 1192–5.
Ferretti L, Ansaloni G, Pozzi L. Cluster-based heuristic for high level synthesis design space exploration. IEEE Trans Emerg Topic Comput. 2021;9(1):35–43. https://doi.org/10.1109/TETC.2018.2794068.
Camposano R. From behavior to structure: high-level synthesis. IEEE Des Test Comput. 1990;7(5):8–19. https://doi.org/10.1109/54.60603.
Muchnick SS. Advanced compiler design & implementation. Burlington: Morgan Kaufmann; 2003.
Nepal K, Li Y, Bahar RI, Reda S. ABACUS: A technique for automated behavioral synthesis of approximate computing circuits. In: 2014 design, automation & test in Europe conference & exhibition (DATE); 2014. p. 1–6. https://doi.org/10.7873/DATE.2014.374.
Hwang C-T, Lee J-H, Hsu Y-C. A formal approach to the scheduling problem in high level synthesis. IEEE Trans Computer-Aided Des Integr Circuits Syst. 1991;10(4):464–75.
Vaverka F, Hrbacek R, Sekanina L. Evolving component library for approximate high-level synthesis. IEEE Symp Series Comput Intell. 2016;2016:1–8. https://doi.org/10.1109/SSCI.2016.7850168.
Mahdiani HR, Ahmadi A, Fakhraie SM, Lucas C. Bio-inspired imprecise computational blocks for efficient VLSI implementation of soft-computing applications. IEEE Trans Circuits Syst I: Regular Papers. 2010;57(4):850–62.
The USC-SIPI Image Database [Online]. Available: http://sipi.usc.edu/database.
Leipnitz MT, Nazar GL. High-level synthesis of resource-oriented approximate designs for FPGAs. In: 2019 56th ACM/IEEE design automation conference (DAC); 2019. p. 1–6.
Witschen L, Mohammadi HG, Artmann M, Platzner M. Jump search: a fast technique for the synthesis of approximate circuits. In: Proceedings of the 2019 on Great Lakes symposium on VLSI (GLSVLSI '19). New York: Association for Computing Machinery; 2019. p. 153–8. https://doi.org/10.1145/3299874.3317998.
Li C, Wei Luo SS, Sapatnekar, Hu J. Joint precision optimization and high-level synthesis for approximate computing. In: 2015 52nd ACM/EDAC/IEEE design automation conference (DAC); 2015. p. 1–6. https://doi.org/10.1145/2744769.2744863.
Awais M, Mohammadi HG, Platzner M. LDAX: a learning-based fast design space exploration framework for approximate circuit synthesis. In: Proceedings of the 2021 on Great Lakes symposium on VLSI (GLSVLSI '21). New York: Association for Computing Machinery. p. 27–32. https://doi.org/10.1145/3453688.3461506.
Mrazek V, Hanif MA, Vasicek Z, Sekanina L, Shafique M. autoAx: an automatic design space exploration and circuit building methodology utilizing libraries of approximate components. In: 2019 56th ACM/IEEE design automation conference (DAC); 2019. p. 1–6.
Vaeztourshizi M, Kamal M, Pedram M. EGAN: a framework for exploring the accuracy vs. energy efficiency trade-off in hardware implementation of error resilient applications. In: 2020 21st international symposium on quality electronic design (ISQED); 2020. p. 438–43. https://doi.org/10.1109/ISQED48828.2020.9137041.
Lee S, John LK, Gerstlauer A. High-level synthesis of approximate hardware under joint precision and voltage scaling. In: Design, automation & test in Europe conference & exhibition (DATE), vol. 2017; 2017. p. 187–92. https://doi.org/10.23919/DATE.2017.7926980.
Deb K, Pratap A, Agarwal S, Meyarivan T. A fast and elitist multiobjective genetic algorithm: NSGA-II. IEEE Trans Evol Comput. 2002;6(2):182–97. https://doi.org/10.1109/4235.996017.
Xu S, Schafer BC. Exposing approximate computing optimizations at different levels: from behavioral to gate-level. IEEE Trans Very Large Scale Integr Syst. 2017;25(11):3077–88. https://doi.org/10.1109/TVLSI.2017.2735299.
Barbareschi M, Iannucci F, Mazzeo A. Automatic design space exploration of approximate algorithms for big data applications. In: 2016 30th international conference on advanced information networking and applications workshops (WAINA); 2016. p. 40–5. https://doi.org/10.1109/WAINA.2016.172.
Lee S, Lee D, Han K, Shriver E, John LK, Gerstlauer A. Statistical quality modeling of approximate hardware. In: 2016 17th international symposium on quality electronic design (ISQED); 2016. p. 163–8. https://doi.org/10.1109/ISQED.2016.7479194.
Elkan C. Using the triangle inequality to accelerate k-means. In: Fawcett T, Mishra N, editors. ICML. AAAI Press; 2003. p. 147–53.
Tabatabaei-Nikkhah S, Zahedi M, Kamal M, Afzali-Kusha A, Pedram M. ACHILLES: accuracy-aware high-level synthesis considering online quality management. IEEE Trans Computer-Aided Des Integr Circuits Syst. 2019;38(8):1452–65. https://doi.org/10.1109/TCAD.2018.2846625.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2022 The Author(s), under exclusive license to Springer Nature Switzerland AG
About this chapter
Cite this chapter
Vaeztourshizi, M., Afzali-Kusha, H., Kamal, M., Pedram, M. (2022). Design Techniques for Approximate Realization of Data-Flow Graphs. In: Liu, W., Lombardi, F. (eds) Approximate Computing. Springer, Cham. https://doi.org/10.1007/978-3-030-98347-5_8
Download citation
DOI: https://doi.org/10.1007/978-3-030-98347-5_8
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-98346-8
Online ISBN: 978-3-030-98347-5
eBook Packages: Computer ScienceComputer Science (R0)