Abstract
Although the use of FPGAs for embedded-oriented CNN accelerators has been spreading owing to a high degree of parallelism and low power consumption, it is still difficult to achieve high performance with FPGAs under strict power constraint. In this paper, we propose a YOLOv3-tiny-based new network model for object detection which uses depthwise separable convolution, and evaluate the effectiveness of the proposal in terms of processing speed, detection accuracy, and power consumption. As a result, we reduced 30% of total latency and 20% of total power. The results showed that depthwise separable convolution is effective not only for improving performance but also for reducing power consumption.
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Araki, Y., Matsuda, M., Manabe, T., Ishizuka, Y., Shibata, Y. (2022). FPGA Implementation of an Object Recognition System with Low Power Consumption Using a YOLOv3-tiny-based CNN. In: Barolli, L. (eds) Complex, Intelligent and Software Intensive Systems. CISIS 2022. Lecture Notes in Networks and Systems, vol 497. Springer, Cham. https://doi.org/10.1007/978-3-031-08812-4_22
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DOI: https://doi.org/10.1007/978-3-031-08812-4_22
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