Abstract
Emulation of Instruction Set Architecture (ISA) is necessary for a wide variety of use cases, such as providing the compatibility to execute programs compiled for a different ISA. This issue is usually solved using Dynamic Binary Translation (DBT), where guest machine code is translated to host ISA on runtime and Just-in-time (JIT) compilation is performed to achieve high-performance emulation. QEMU, a famous emulator, is developed to solve this issue, where Tiny Code Generator (TCG) is constructed to translate guest binary code to TCG Intermediate Representation (IR), and then generate target ISA machine code from TCG IR. Due to the limitations of TCG, some extensions, such as HQEMU, use LLVM as the backend to optimize programs and generate high-performance machine code. However, HQEMU is limited by its underlying implementation. That is, HQEMU still translates guest binary code to TCG IR at first. In this paper, we develop a novel, LLVM-based emulator, where guest machine code is directly lifted to LLVM IR to reduce the extra overhead and produce high-quality machine code. We evaluate our DBT emulator using BYTEmark benchmark and demonstrating its ability to outperform the de facto standard QEMU DBT system. The evaluation results confirm that our emulator delivers an average speedup of 3.3x over QEMU across BYTEmark benchmark compiled for x86-64 running on an ARMv8 platform, meanwhile, demonstrate that our user-level DBT emulator can significantly reduce the overhead to run a program on a cross-ISA system.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Bala, V., Duesterwald, E., Banerjia, S.: Dynamo: a transparent dynamic optimization system. SIGPLAN Not. 35(5), 1–12 (2000). https://doi.org/10.1145/358438.349303
Barham, P., et al.: Xen and the art of virtualization. In: Proceedings of the Nineteenth ACM Symposium on Operating Systems Principles, SOSP 2003, pp. 164–177. Association for Computing Machinery, New York (2003). https://doi.org/10.1145/945445.945462
Bellard, F.: QEMU, a fast and portable dynamic translator. In: 2005 USENIX Annual Technical Conference (USENIX ATC 2005), Anaheim, CA. USENIX Association, April 2005
Brandner, F., Fellnhofer, A., Krall, A., Riegler, D.: Fast and accurate simulation using the LLVM compiler framework. In: Proceedings of the 1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO, vol. 9, pp. 1–6 (2009)
Bruening, D., Amarasinghe, S.: Efficient, transparent, and comprehensive runtime code manipulation. Ph.D. thesis, Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science (2004)
Bruening, D., Garnett, T., Amarasinghe, S.: An infrastructure for adaptive dynamic optimization. In: Proceedings of the International Symposium on Code Generation and Optimization: Feedback-Directed and Runtime Optimization, CGO 2003, pp. 265–275. IEEE Computer Society, USA (2003). https://doi.org/10.5555/776261.776290
Chapman, M., Magenheimer, D.J., Ranganathan, P.: Magixen: combining binary translation and virtualization. HP Enterprise Systems and Software Laboratory, pp. 1–15 (2007)
Chipounov, V., Candea, G.: Dynamically translating x86 to LLVM using QEMU. Technical report, EPFL (2010)
Cifuentes, C., Lewis, B., Ung, D.: Walkabout-a retargetable dynamic binary translation framework. In: Workshop on Binary Translation, pp. 22–25 (2002)
d’Antras, A., Gorgovan, C., Garside, J., Goodacre, J., Luján, M.: Hypermambo-x64: using virtualization to support high-performance transparent binary translation. In: Proceedings of the 13th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE 2017, pp. 228–241. Association for Computing Machinery, New York (2017). https://doi.org/10.1145/3050748.3050756
Dehnert, J.C., et al.: The transmeta code morphing™ software: using speculation, recovery, and adaptive retranslation to address real-life challenges. In: Proceedings of the International Symposium on Code Generation and Optimization: Feedback-Directed and Runtime Optimization, CGO 2003, pp. 15–24. IEEE Computer Society, USA (2003). https://doi.org/10.5555/776261.776263
Ding, J.H., Chang, P.C., Hsu, W.C., Chung, Y.C.: PQEMU: a parallel system emulator based on QEMU. In: 2011 IEEE 17th International Conference on Parallel and Distributed Systems, pp. 276–283 (2011). https://doi.org/10.1109/ICPADS.2011.102
Engelke, A., Okwieka, D., Schulz, M.: Efficient LLVM-based dynamic binary translation. In: Proceedings of the 17th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE 2021, pp. 165–171. Association for Computing Machinery, New York (2021). https://doi.org/10.1145/3453933.3454022
Engelke, A., Schulz, M.: Instrew: leveraging LLVM for high performance dynamic binary instrumentation. In: Proceedings of the 16th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE 2020, pp. 172–184. Association for Computing Machinery, New York (2020). https://doi.org/10.1145/3381052.3381319
Hong, D.Y., et al.: HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores. In: Proceedings of the Tenth International Symposium on Code Generation and Optimization, CGO 2012, pp. 104–113. Association for Computing Machinery, New York (2012). https://doi.org/10.1145/2259016.2259030
Hsu, C.C., et al.: LNQ: building high performance dynamic binary translators with existing compiler backends. In: 2011 International Conference on Parallel Processing, pp. 226–234 (2011). https://doi.org/10.1109/ICPP.2011.57
Kivity, A., Kamay, Y., Laor, D., Lublin, U., Liguori, A.: KVM: the Linux virtual machine monitor. In: Proceedings of the Linux Symposium, Dttawa, Dntorio, Canada, vol. 1, pp. 225–230 (2007)
Knowles, P.: Transitive and quicktransit overview (2008). https://www.linux-kvm.org/images/9/98/KvmForum2008%24kdf2008_2.pdf
Lattner, C., Adve, V.: LLVM: a compilation framework for lifelong program analysis and transformation. In: Proceedings of the International Symposium on Code Generation and Optimization: Feedback-Directed and Runtime Optimization, CGO 2004, p. 75. IEEE Computer Society, USA (2004). https://doi.org/10.5555/977395.977673
Luk, C.K., et al.: Pin: building customized program analysis tools with dynamic instrumentation. In: Proceedings of the 2005 ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2005, pp. 190–200. Association for Computing Machinery, New York (2005). https://doi.org/10.1145/1065010.1065034
Lyu, Y.H., et al.: DBILL: an efficient and retargetable dynamic binary instrumentation framework using LLVM backend. In: Proceedings of the 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE 2014, pp. 141–152. Association for Computing Machinery, New York (2014). https://doi.org/10.1145/2576195.2576213
Nethercote, N., Seward, J.: Valgrind: a framework for heavyweight dynamic binary instrumentation. In: Proceedings of the 28th ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2007, pp. 89–100. Association for Computing Machinery, New York (2007). https://doi.org/10.1145/1250734.1250746
Ottoni, G., Hartin, T., Weaver, C., Brandt, J., Kuttanna, B., Wang, H.: Harmonia: a transparent, efficient, and harmonious dynamic binary translator targeting the intel® architecture. In: Proceedings of the 8th ACM International Conference on Computing Frontiers, CF 2011. Association for Computing Machinery, New York (2011). https://doi.org/10.1145/2016604.2016635
Probst, M.: Dynamic binary translation. In: UKUUG Linux Developer’s Conference, vol. 2002 (2002)
Shigenobu, K., Ootsu, K., Ohkawa, T., Yokota, T.: A translation method of arm machine code to LLVM-IR for binary code parallelization and optimization. In: 2017 Fifth International Symposium on Computing and Networking (CANDAR), pp. 575–579 (2017). https://doi.org/10.1109/CANDAR.2017.75
Souza, M., Nicácio, D., Araújo, G.: ISAMAP: instruction mapping driven by dynamic binary translation. In: Varbanescu, A.L., Molnos, A., van Nieuwpoort, R. (eds.) ISCA 2010. LNCS, vol. 6161, pp. 117–138. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-24322-6_11
Spink, T., Wagstaff, H., Franke, B.: Hardware-accelerated cross-architecture full-system virtualization. ACM Trans. Archit. Code Optim. 13(4), 1–25 (2016). https://doi.org/10.1145/2996798
Spink, T., Wagstaff, H., Franke, B.: A retargetable system-level DBT hypervisor. ACM Trans. Comput. Syst. 36(4), 1–24 (2020). https://doi.org/10.1145/3386161
Tröger, J.: Specification-driven dynamic binary translation. Ph.D. thesis, Queensland University of Technology (2005)
Witchel, E., Rosenblum, M.: Embra: fast and flexible machine simulation. In: Proceedings of the 1996 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 1996, pp. 68–79. Association for Computing Machinery, New York (1996). https://doi.org/10.1145/233013.233025
Acknowledgments
The authors gratefully acknowledge the anonymous reviewers for their constructive comments. This work is supported in part by the National Key Research and Development Program of China (No.2018YFB1700203), and by National Natural Science Foundation of China (NSFC) under Grant No. 62132007 as well as gifts from Huawei.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2022 Springer Nature Switzerland AG
About this paper
Cite this paper
Li, W., Luo, X., Zhang, Y., Meng, Q., Ren, F. (2022). CrossDBT: An LLVM-Based User-Level Dynamic Binary Translation Emulator. In: Cano, J., Trinder, P. (eds) Euro-Par 2022: Parallel Processing. Euro-Par 2022. Lecture Notes in Computer Science, vol 13440. Springer, Cham. https://doi.org/10.1007/978-3-031-12597-3_1
Download citation
DOI: https://doi.org/10.1007/978-3-031-12597-3_1
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-12596-6
Online ISBN: 978-3-031-12597-3
eBook Packages: Computer ScienceComputer Science (R0)