Skip to main content
SpringerLink
Log in

CHA: Supporting SVA-Like Assertions in Formal Verification of Chisel Programs (Tool Paper)

  • Conference paper
  • First Online:
Software Engineering and Formal Methods (SEFM 2022)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 13550))

Included in the following conference series:

Abstract

We present CHA, an assertion language and verification tool for Chisel programs built on top of ChiselTest, where we extend the Chisel assertion language with SystemVerilog assertions (SVA)-like temporal operators. This enables formal verification of Chisel hardware designs against general temporal properties. The effectiveness of the CHA tool is validated by two case studies, including an open-source Wishbone protocol adapter design.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 54.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 69.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Notes

  1. 1.

    https://github.com/ucb-bar/chiseltest.

References

  1. Asanović, K., Avizienis, R., Bachrach, J., et al.: The rocket chip generator. Technical report UCB/EECS-2016-17, EECS Department, UC Berkeley (2016). http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-17.html

  2. Bachrach, J., Vo, H., Richards, B., et al.: Chisel: constructing hardware in a Scala embedded language. In: DAC, pp. 1212–1221. ACM (2012). https://doi.org/10.1145/2228360.2228584

  3. Biere, A., Artho, C., Schuppan, V.: Liveness checking as safety checking. Electr. Notes Theor. Comput. Sci. 66(2), 160–177 (2002). https://doi.org/10.1016/S1571-0661(04)80410-9

    Article  Google Scholar 

  4. Chinese Academy of Sciences, Institute of Computing Technology: Xiangshan CPU (2022). https://github.com/OpenXiangShan/XiangShan

  5. Dobis, A., et al.: ChiselVerify: an open-source hardware verification library for chisel and scala. In: NorCAS, pp. 1–7. IEEE (2021). https://doi.org/10.1109/NorCAS53631.2021.9599869

  6. Duret-Lutz, A., Lewkowicz, A., Fauchille, A., Michaud, T., Renault, É., Xu, L.: Spot 2.0 — a framework for LTL and \(\omega \)-automata manipulation. In: Artho, C., Legay, A., Peled, D. (eds.) ATVA 2016. LNCS, vol. 9938, pp. 122–129. Springer, Cham (2016). https://doi.org/10.1007/978-3-319-46520-3_8

    Chapter  Google Scholar 

  7. Goel, A., Sakallah, K.: AVR: abstractly verifying reachability. In: TACAS 2020. LNCS, vol. 12078, pp. 413–422. Springer, Cham (2020). https://doi.org/10.1007/978-3-030-45190-5_23

    Chapter  Google Scholar 

  8. IEEE standard for SystemVerilog: unified hardware design, specification, and verification language, pp. 1800–2017. IEEE (2018). https://doi.org/10.1109/IEEESTD.2018.8299595

  9. Khan, M.H., Kashif, S.: Caravan (2021). https://github.com/merledu/caravan

  10. Laeufer, K., Bachrach, J., Sen, K.: Open-source formal verification for Chisel. In: WOSET (2021). https://woset-workshop.github.io/WOSET2021.html

  11. Mann, M., et al.: Pono: a flexible and extensible SMT-based model checker. In: Silva, A., Leino, K.R.M. (eds.) CAV 2021. LNCS, vol. 12760, pp. 461–474. Springer, Cham (2021). https://doi.org/10.1007/978-3-030-81688-9_22

    Chapter  Google Scholar 

  12. Niemetz, A., Preiner, M., Wolf, C., Biere, A.: Btor2, BtorMC and Boolector 3.0. In: Chockler, H., Weissenbacher, G. (eds.) CAV 2018. LNCS, vol. 10981, pp. 587–595. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-96145-3_32

    Chapter  Google Scholar 

  13. Tsai, Y.C.A.: Dynamic verification library for chisel. Master’s thesis, University of California, Berkeley (2021). http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-132.html, Technical report UCB/EECS-2021-132

  14. University of California, Berkeley: BOOM: the Berkeley out-of-order RISC-V processor (2020). https://github.com/riscv-boom

  15. University of Chinese Academy of Sciences: NutShell (2021). https://github.com/OSCPU/NutShell

  16. Wolf, C., Harder, J., Engelhardt, N., et al.: SymbiYosys: front-end for Yosys-based formal verification flows (2022). https://github.com/YosysHQ/sby

  17. Xiang, M., Li, Y., Tan, S., Zhao, Y., Chi, Y.: Parameterized design and formal verification of multi-ported memory. In: ICECCS, pp. 33–41. IEEE (2022). https://doi.org/10.1109/ICECCS54210.2022.00013

  18. Yu, S., Dong, Y., et al.: CHA: Supporting SVA-like assertions in formal verification of Chisel programs (2022). https://github.com/iscas-tis/CHA

Download references

Acknowledgement

This work is partially supported by the Strategic Priority Research Program of the Chinese Academy of Sciences and the NSFC grants No. 61872340, 61836005, 62102407.

Author information

Authors and Affiliations

  1. State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing, China

    Shizhen Yu, Yifan Dong, Yong Li, Zhilin Wu, David N. Jansen & Lijun Zhang

  2. University of Chinese Academy of Sciences, Beijing, China

    Shizhen Yu, Yifan Dong, Zhilin Wu & Lijun Zhang

  3. Huazhong University of Science and Technology, Wuhan, China

    Jiuyang Liu

Authors
  1. Shizhen Yu
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Yifan Dong
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Jiuyang Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Yong Li
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Zhilin Wu
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. David N. Jansen
    View author publications

    You can also search for this author in PubMed Google Scholar

  7. Lijun Zhang
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Zhilin Wu .

Editor information

Editors and Affiliations

  1. Humboldt-Universität zu Berlin, Berlin, Germany

    Bernd-Holger Schlingloff

  2. Beijing Jiaotong University, Beijing, China

    Ming Chai

1 Electronic supplementary material

Below is the link to the electronic supplementary material.

Supplementary material 1 (pdf 231 KB)

Rights and permissions

Reprints and permissions

Copyright information

© 2022 The Author(s), under exclusive license to Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Yu, S. et al. (2022). CHA: Supporting SVA-Like Assertions in Formal Verification of Chisel Programs (Tool Paper). In: Schlingloff, BH., Chai, M. (eds) Software Engineering and Formal Methods. SEFM 2022. Lecture Notes in Computer Science, vol 13550. Springer, Cham. https://doi.org/10.1007/978-3-031-17108-6_20

Download citation

  • DOI: https://doi.org/10.1007/978-3-031-17108-6_20

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-031-17107-9

  • Online ISBN: 978-3-031-17108-6

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics

Search

Navigation