Abstract
The development of embedded systems requires formal analysis of models such as those described with MATLAB/Simulink. However, the increasing complexity of industrial models makes analysis difficult. This paper proposes a model checking method for Simulink models using SMT solvers. The proposed method aims at (1) automated, efficient and comprehensible verification of complex models, (2) numerically accurate analysis of models, and (3) demonstrating the analysis of Simulink models using an SMT solver (we use Z3). It first encodes a target model into a predicate logic formula in the domain of mathematical arithmetic and bit vectors. We explore how to encode various Simulink blocks exactly. Then, the method verifies a given invariance property using the k-induction-based algorithm that extracts a subsystem involving the target block and unrolls the execution paths incrementally. In the experiment, we applied the proposed method and other tools to a set of models and properties. Our method successfully verified most of the properties including those unverified with other tools.
This work was supported by JSPS KAKENHI Grant Numbers 18K11240, 18H03220.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
Notes
- 1.
- 2.
- 3.
- 4.
We consider only nonvirtual buses.
- 5.
- 6.
- 7.
- 8.
It is likely to depend on other factors, e.g. the form of encoded formulas and the number of solutions; a detailed analysis is omitted from this paper.
References
Baranowski, M., He, S., Lechner, M., Nguyen, T.S., Rakamarić, Z.: An SMT theory of fixed-point arithmetic. In: Peltier, N., Sofronie-Stokkermans, V. (eds.) IJCAR 2020. LNCS (LNAI), vol. 12166, pp. 13–31. Springer, Cham (2020). https://doi.org/10.1007/978-3-030-51074-9_2
Barrett, C., Fontaine, P., Tinelli, C.: The SMT-LIB Standard (Version 2.6) (2021). https://smtlib.cs.uiowa.edu/
Biere, A., Kröning, D.: SAT-based model checking. In: Clarke, E., Henzinger, T., Veith, H., Bloem, R. (eds.) Handbook of Model Checking, pp. 277–303. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-10575-8_10
Bouissou, O., Chapoutot, A.: An operational semantics for Simulink’s simulation engine. ACM SIGPLAN Notices 47(5), 129–138 (2012). https://doi.org/10.1145/2345141.2248437
Bourbouh, H., Garoche, P.l., Loquen, T., Noulard, E., Pagetti, C.: CoCoSim, a code generation framework for control/command applications. In: ERTS, pp. 1–11 (2020)
Bradley, A.R.: SAT-based model checking without unrolling. In: Jhala, R., Schmidt, D. (eds.) VMCAI 2011. LNCS, vol. 6538, pp. 70–87. Springer, Heidelberg (2011). https://doi.org/10.1007/978-3-642-18275-4_7
Brain, M., Schanda, F., Sun, Y.: Building better bit-blasting for floating-point problems. In: Vojnar, T., Zhang, L. (eds.) TACAS 2019. LNCS, vol. 11427, pp. 79–98. Springer, Cham (2019). https://doi.org/10.1007/978-3-030-17462-0_5
Caspi, P., Curic, A., Maignan, A., Sofronis, C., Tripakis, S., Niebert, P.: From simulink to SCADE/Lustre to TTA: a layered approach for distributed embedded applications. ACM SIGPLAN Notices 38(7), 153–162 (2003). https://doi.org/10.1145/780731.780754
Chakrabarti, S., Ramesh, S.: SymTest: a framework for symbolic testing of embedded software. In: ISEC, pp. 48–58 (2016). https://doi.org/10.1145/2856636.2856642
Champion, A., Mebsout, A., Sticksel, C., Tinelli, C.: The Kind 2 model checker. In: Chaudhuri, S., Farzan, A. (eds.) CAV 2016. LNCS, vol. 9780, pp. 510–517. Springer, Cham (2016). https://doi.org/10.1007/978-3-319-41540-6_29
Elliott, C.: Cyber-physical V &V challenges for the evaluation of state of the art model checkers. In: Safe and Secure Systems and Software Symposium (S5) (2016)
Filipovikj, P., Rodriguez-Navas, G., Seceleanu, C.: Bounded invariance checking of simulink models. In: SAC, pp. 2168–2177 (2019). https://doi.org/10.1145/3297280.3297493
Hagen, G., Tinelli, C.: Scaling up the formal verification of Lustre programs with SMT-based techniques. In: FMCAD, pp. 1–9. IEEE (2008). https://doi.org/10.1109/FMCAD.2008.ECP.19
Halbwachs, N., Lagnier, F., Raymond, P.: Synchronous observers and the verification of reactive systems. In: Algebraic Methodology and Software Technology (AMAST), pp. 83–96 (1993)
Kahsai, T., Gurfinkel, A.: Zustre (2018). https://github.com/coco-team/zustre
Kahsai, T., Tinelli, C.: PKind: a parallel k-induction based model checker. In: International Workshop on Parallel and Distributed Methods in verification (PDMC), vol. 72, pp. 55–62 (2011). https://doi.org/10.4204/eptcs.72.6
Kroening, D., Strichman, O.: Decision Procedures, 2nd edn. Springer, Heidelberg (2016). https://doi.org/10.1007/978-3-662-50497-0
Lee, E.A., Seshia, S.A.: Introduction to Embedded Systems. A Cyber-Physical Systems Approach, 2nd edn. MIT Press, Cambridge (2017). http://leeseshia.org
Mavridou, A., et al.: The ten lockheed martin cyber-physical challenges: formalized, analyzed, and explained. In: IEEE International Conference on Requirements Engineering, pp. 300–310 (2020). https://doi.org/10.1109/RE48521.2020.00040
Peranandam, P., Raviram, S., Satpathy, M., Yeolekar, A., Gadkari, A., Ramesh, S.: An integrated test generation tool for enhanced coverage of Simulink/Stateflow models. In: DATE, pp. 308–311. IEEE (2012). https://doi.org/10.1109/date.2012.6176485
Raviram, S., Peranandam, P., Satpathy, M., Ramesh, S.: A test suite booster for enhanced structural coverage. In: Roychoudhury, A., D’Souza, M. (eds.) ICTAC 2012. LNCS, vol. 7521, pp. 164–167. Springer, Heidelberg (2012). https://doi.org/10.1007/978-3-642-32943-2_13
Ren, H., Bhatt, D., Hvozdovic, J.: Improving an industrial test generation tool using SMT solver. In: Rayadurgam, S., Tkachuk, O. (eds.) NFM 2016. LNCS, vol. 9690, pp. 100–106. Springer, Cham (2016). https://doi.org/10.1007/978-3-319-40648-0_8
Sheeran, M., Singh, S., Stålmarck, G.: Checking safety properties using induction and a SAT-solver. In: Hunt, W.A., Johnson, S.D. (eds.) FMCAD 2000. LNCS, vol. 1954, pp. 127–144. Springer, Heidelberg (2000). https://doi.org/10.1007/3-540-40922-X_8
Tripakis, S., Sofronis, C., Caspi, P., Curic, A.: Translating discrete-time simulink to Lustre. ACM Trans. Embed. Comput. Syst. 4(4), 779–818 (2005). https://doi.org/10.1145/1113830.1113834
Zhou, C., Kumar, R.: Semantic translation of simulink diagrams to input/output extended finite automata. Discrete Event Dyn. Syst. Theory Appl. 22(2), 223–247 (2012). https://doi.org/10.1007/s10626-010-0096-1
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2022 Springer Nature Switzerland AG
About this paper
Cite this paper
Ishii, D., Tomita, T., Aoki, T., Ngo, T.Q., Do, T.B.N., Takai, H. (2022). SMT-Based Model Checking of Industrial Simulink Models. In: Riesco, A., Zhang, M. (eds) Formal Methods and Software Engineering. ICFEM 2022. Lecture Notes in Computer Science, vol 13478. Springer, Cham. https://doi.org/10.1007/978-3-031-17244-1_10
Download citation
DOI: https://doi.org/10.1007/978-3-031-17244-1_10
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-17243-4
Online ISBN: 978-3-031-17244-1
eBook Packages: Computer ScienceComputer Science (R0)