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Quantum Tunnelling and Themonic Emission, Transistor Simulation

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VLSI Design and Test (VDAT 2022)

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 1687))

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Abstract

The novelty of the article is to bring the concept of thermionic emission and inter-band tunnelling together in the charge plasma tunnel FET (CP-TFET). The use of a thin n+ the doped layer which is placed under the channel in a dielectric box (SiO2) injects extra electrons into the channel through the vertical thermionic emission process. The vertical thermionic emission causes a surplus to the electrons that are coming from horizontal tunnelling and that leads to six decades of furtherance in the drain current and ten decades of increment in the leakage current in the conventional CP-TFET structure. In addition, deposition of two metals of different work-function over the drain region is used for resolving the issues of higher leakage and ambipolar behavior of conventional TFET in the final state of art. The dual metal drain improves the reliability concern of CP-TFET at circuit level implementation and AS provides a good current driving ability.

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Correspondence to Shivendra Yadav .

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Yadav, S., Joshi, D., Kalita, S., Singh, T. (2022). Quantum Tunnelling and Themonic Emission, Transistor Simulation. In: Shah, A.P., Dasgupta, S., Darji, A., Tudu, J. (eds) VLSI Design and Test. VDAT 2022. Communications in Computer and Information Science, vol 1687. Springer, Cham. https://doi.org/10.1007/978-3-031-21514-8_11

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  • DOI: https://doi.org/10.1007/978-3-031-21514-8_11

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-031-21513-1

  • Online ISBN: 978-3-031-21514-8

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