Tile Serial Protocol (TSP) ASIC for Distributed Controllers of Space-Borne RADAR

Abstract

This paper describes novel serial protocol for transmission of data and timing events for distributed controllers of Space-borne Radar systems. This paper also describes implementation of this protocol as Radiation Hardened (RH) Application Specific Integrated Circuit (ASIC) based on 180 nm CMOS process. Traditionally, serial data and timing signals are transmitted as separate inter-connect lines from central controller to distributed controllers. Phased array radar systems consists of hundreds of such distributed controllers, which results in huge interconnect harness cables. In the proposed protocol, a single differential line is used to transmit tele-command data and timing events from central controller to all distributed controllers as well as to receive the telemetry data. Serial data is transmitted in the form of frames of 20 bits each. A unique sync frame is transmitted from central controller to distributed controllers periodically which serves as a reference for all timing signals. There are different types of frames for transmission of tele-command, telemetry and timing signal parameters. Advantage of this protocol is significant reduction in harness, which leads to reduced payload weight and size. It provides higher reliability due to inbuilt dual redundant channels. This IP has been designed using VHDL and is implemented on 180 nm CMOS process as a mixed signal ASIC. The TSP ASIC contains digital modules like frame encoder & decoder, sync pulse generator, timing sampler & re-generator, channel selector, wave encoder & decoder, fail safe module and analog modules like LVR, RS485. The ASIC can operate up to 60 MHz and consumes 0.21 W power. The TSP ASIC has been packaged in 256 pins CQFP package and has been electrically characterized. The ASIC has been radiation tested for heavy ions single event effect and it has successfully cleared 70 $\mathrm{MeV-cm}^2/\textrm{mg}$ LET and 185 Mev beam energy levels.