Abstract
Nowadays, in the world of high-performance computing, saving energy when great computing power is not needed is a must-to-have feature. This usually involves the implementation of Power Management Systems (PMS) to apply power saving polices such as frequency scaling. In particular, for this feature, the actuators of PMS are usually implemented with Phase- or Frequency-Locked Loops, which should occupy a small area and exhibit a low-power consumption. Additionally, they should be able to generate a wide range of frequencies in the order of a few GHz with a fine granularity of a few hundreds of MHz. Since the core of such loops is a tunable oscillator, in this work we present a pseudo-differential Ring Digitally Controlled Oscillator (DCO) implemented with a standard 28 nm CMOS technology to be used in PMS. The proposed DCO features a well-balanced behavior between the noise performance and a wide tuning range, a low-area, and a low-power consumption.
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References
Lojko, B.: A contribution to the design of a frequency synthesizer for fast frequency-hopped spread-spectrum systems. In: 17th International Conference Radioelektronika (2007)
Benini, L., et al.: A survey of design techniques for system-level dynamic power management. IEEE Trans. Very Large Scale Integr. Syst. 8(3), 299–316 (2000)
Gardner, F.M.: Phaselock Techniques. Wiley, New York (2005)
Mestice, M., et al.: Analysis and design of integrated blocks for a 6.25 GHz Spacefibre PLL. Sensors 20, 4013 (2020)
Golestan, S., et al.: Single-phase frequency-locked loops: a comprehensive review. IEEE Trans. Power Electron. 34(12), 11791–11812 (2019)
Bellasi, D.E., et al.: Smart energy-efficient clock synthesizer for duty-cycled sensor SoCs in 65 nm/28nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 64(9), 2322–2333 (2017). https://doi.org/10.1109/TCSI.2017.2694322
Zhang, X., et al.: An evaluation of {Per-Chip} nonuniform frequency scaling on multicores. In: 2010 USENIX Annual Technical Conference (USENIX ATC 2010) (2010)
Rabaey, J.M.: Digital Integrated Circuits: A Design Perspective. Prentice-Hall, Inc., Upper Saddle River (1996)
Andreani, P., et al.: A digitally controlled shunt capacitor CMOS delay line. Analog Integr. Circ. Sig. Process 18, 89–96 (1999)
Suman, S., Sharma, K.G., Ghosh, P.K.: Analysis and design of current starved ring VCO. In: 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT) (2016)
Maymandi-Nejad, M., et al.: A digitally programmable delay element: design and analysis. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 11(5), 871–878 (2003)
Jalil, J., et al.: CMOS differential ring oscillators: review of the performance of CMOS ROs in communication systems. IEEE Microwave Mag. 14(5), 97–109 (2013)
Gorji, J., et al.: A 2.7 to 4.6 GHz multi-phase high resolution and wide tuning range digitally-controlled oscillator in CMOS 65 nm. In: 2016 24th Iranian Conference on Electrical Engineering (ICEE), 2016, pp. 1694–1699 (2016)
Ciarpi, G., et al.: Design and characterization of 10 Gb/s and 1 Grad TID-tolerant optical modulator driver. IEEE Trans. Circ. Syst. I Regul. Pap. 69(8), 3177–3189 (2022)
Monda, D., et al.: Design and verification of a 6.25 GHz LC-Tank VCO integrated in 65 nm CMOS technology operating up to 1 Grad TID. IEEE Trans. Nucl. Sci. 68(10), 2524–2532 (2021)
Razavi, B.: The current-steering DAC [A Circuit for All Seasons]. IEEE Solid-State Circ. Mag. 10(1), 11–15 (2018). https://doi.org/10.1109/MSSC.2017.2771102
Levinger, R., et al.: A 3.9-4.7 GHz 0.35 mW DCO with −187.4 dBc FoM in 28nm CMOS. In: 2018 13th European Microwave Integrated Circuits Conference (EuMIC), pp. 194–197 (2018)
Bisiaux, P., et al.: Design of a 1.5 GHz low jitter DCO ring in 28 nm CMOS process. In: 2020 European Conference on Circuit Theory and Design (ECCTD), pp. 1–5 (2020)
Selvaraj, S., et al.: Low phase noise, high resolution digitally-controlled ring oscillator operating at 2.2 GHz. In: 2020 9th International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–4 (2020)
Acknowledgments
Work partially supported by European Union’s Horizon 2020 research and innovation program under grant agreement No 101036168 (European Process Initiative SGA2), and by MIUR with the Dipartimenti di Eccellenza 2018-2022 Crosslab project.
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Mestice, M., Biondi, G., Ciarpi, G., Rossi, D., Saponara, S. (2023). A Low-Area, Low-Power, Wide Tuning Range Digitally Controlled Oscillator for Power Management Systems in 28 nm CMOS Technology. In: Berta, R., De Gloria, A. (eds) Applications in Electronics Pervading Industry, Environment and Society. ApplePies 2022. Lecture Notes in Electrical Engineering, vol 1036. Springer, Cham. https://doi.org/10.1007/978-3-031-30333-3_24
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DOI: https://doi.org/10.1007/978-3-031-30333-3_24
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