Abstract
Persistent memory (PM) provides byte-addressability, low latency as well as data persistence. Recently, a new feature called eADR is available on the 3rd generation Intel Xeon Scalable Processors with the 2nd generation Intel Optane PM. eADR ensures that data stored within the CPU caches will be flushed to PM upon the power failure.
In the eADR platform, previous PM-based work suffered more read/write amplification and random access problems, and memory allocations on PM are still expensive. The persistence ways on the eADR platform are still unclear. Therefore, we propose PFtree (PM Line Accesses Friendly Adaptive Radix Tree), a persistent index optimized for the eADR platform. PFtree reduces PM line access with two optimizations: stores key-value pair in leaf array directly to reduce pointer chasing and stores necessary metadata with key-value pair closely and auxiliary metadata in DRAM. PFtree reduces memory allocations in critical paths by allocating bulk memory when creating a leaf array. Then, we design an adaptive persistence way based on data block size for PFtree to fully use PM bandwidth. Experimental results show that our proposed PFtree outperforms the radix tree by up to 1.2\(\times \) and B+-Trees by 1.1−7\(\times \) throughput, respectively, with multi-threads.
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This research is supported in part by the National Key Research and Development Program of China (2021YFC3300600).
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Zhang, R. et al. (2023). PFtree: Optimizing Persistent Adaptive Radix Tree for PM Systems on eADR Platform. In: Wang, X., et al. Database Systems for Advanced Applications. DASFAA 2023. Lecture Notes in Computer Science, vol 13943. Springer, Cham. https://doi.org/10.1007/978-3-031-30637-2_4
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DOI: https://doi.org/10.1007/978-3-031-30637-2_4
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