Abstract
Nowadays, embedded processors face various hardware security issues such as hardware trojans (HT) and code tamper attacks. In this paper, a novel cycle-level recovery method for HT tamper in embedded processor is proposed, which consists two units, a General-Purpose Register (GPRs) backup unit and a PC rollback unit. The former one is designed to replace original register files with backup function extra. And the latter one is composed for rollback operations based on the exact PC address corresponding to the wrong instruction. If a HT tamper is detected, the backup unit works in conjunction with PC rollback unit allowing the processor to resume the instruction execution. The proposed method has been implanted into a RISC-V core of PULpino, and the experimental results show that the processor can restore from fault state caused by inserted HT in real time with the latency of 7 clock cycles, including 2 clock cycles for detection.
Supported by University of Electronic Science and Technology of China.
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Acknowledgments
This work is partly supported by Sichuan Science and Technology Program under Grant 2021YJ0082. And the authors would like to thank IC Team for providing advice and discussion.
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Zhou, W., Yuan, S., Li, L., Yeh, KH. (2023). A Novel Fast Recovery Method for HT Tamper in Embedded Processor. In: Meng, W., Li, W. (eds) Blockchain Technology and Emerging Technologies. BlockTEA 2022. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 498. Springer, Cham. https://doi.org/10.1007/978-3-031-31420-9_8
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DOI: https://doi.org/10.1007/978-3-031-31420-9_8
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