Abstract
PLCverif is an actively developed project at CERN, enabling the formal verification of Programmable Logic Controller (PLC) programs in critical systems. In this paper, we present our work on improving the formal requirements specification experience in PLCverif through the use of natural language. To this end, we integrate NASA’s FRET, a formal requirement elicitation and authoring tool, into PLCverif. FRET is used to specify formal requirements in structured natural language, which automatically translates into temporal logic formulae. FRET’s output is then directly used by PLCverif for verification purposes. We discuss practical challenges that PLCverif users face when authoring requirements and the FRET features that help alleviate these problems. We present the new requirement formalization workflow and report our experience using it on two critical CERN case studies.
Z. Ádám and I. D. Lopez-Miguel—Work performed while at CERN.
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References
FRET: Formal requirements elicitation tool. https://github.com/NASA-SW-VnV/fret
High luminosity large hadron collider webpage. https://home.cern/science/accelerators/high-luminosity-lhc
PLCverif: A tool to verify PLC programs based on model checking techniques. https://gitlab.com/plcverif-oss
UNICOS webpage. https://unicos.web.cern.ch/
Beyer, D., Henzinger, T.A., Jhala, R., Majumdar, R.: The software model checker Blast. Int. J. Softw. Tools Technol. Transf. 9(5-6), 505–525 (2007). https://doi.org/10.1007/s10009-007-0044-z
Darvas, D., Fernández Adiego, B., Blanco Viñuela, E.: PLCverif: a tool to verify PLC programs based on model checking techniques. In: Proceedings of the ICALEPCS 2015, October 2015. https://doi.org/10.18429/JACoW-ICALEPCS2015-WEPGF092
Fernández Adiego, B., Blanco Viñuela, E.: Applying model checking to critical PLC applications: an ITER case study. In: Proceedings of the ICALEPCS 2017, October 2017. https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA161
Fernández Adiego, B., et al.: Applying model checking to industrial-sized PLC programs. IEEE Trans. Ind. Inform. 11, 1400–1410 (2015). https://doi.org/10.1109/TII.2015.2489184
Fernández Adiego, B., Lopez-Miguel, I.D., Tournier, J.C., Blanco Viñuela, E., Ladzinski, T., Havart, F.: Applying model checking to highly-configurable safety critical software: the SPS-PPS PLC program. In: Proceedings of the ICALEPCS’21, March 2022. https://doi.org/10.18429/JACoW-ICALEPCS2021-WEPV042
Giannakopoulou, D., Pressburger, T., Mavridou, A., Rhein, J., Schumann, J., Shi, N.: Formal requirements elicitation with FRET. In: REFSQ Tools (2020)
Giannakopoulou, D., Pressburger, T., Mavridou, A., Schumann, J.: Automated formalization of structured natural language requirements. Inf. Softw. Technol. 137, 106590 (2021)
Lopez-Miguel, I.D., Tournier, J.C., Fernández Adiego, B.: PLCverif: status of a formal verification tool for programmable logic controller. In: Proceedings of the ICALEPCS’21, March 2022. https://doi.org/10.18429/JACoW-ICALEPCS2021-MOPV042
Viñuela, E.B., Darvas, D., Molnár, V.: PLCverif re-engineered: an open platform for the formal analysis of PLC programs. In: Proceedings of the ICALEPCS’19, pp. 21–27. No. 17 in International Conference on Accelerator and Large Experimental Physics Control Systems, JACoW Publishing, Geneva, Switzerland, August 2020. https://doi.org/10.18429/JACoW-ICALEPCS2019-MOBPP01, https://jacow.org/icalepcs2019/papers/mobpp01.pdf
Ádám, Z., et al.: Automated verification of programmable logic controller programs against structured natural language requirements. Technical report NASA/TM 0230003752 (2023)
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Ádám, Z. et al. (2023). From Natural Language Requirements to the Verification of Programmable Logic Controllers: Integrating FRET into PLCverif. In: Rozier, K.Y., Chaudhuri, S. (eds) NASA Formal Methods. NFM 2023. Lecture Notes in Computer Science, vol 13903. Springer, Cham. https://doi.org/10.1007/978-3-031-33170-1_21
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DOI: https://doi.org/10.1007/978-3-031-33170-1_21
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