Abstract
For processors with vectorial computing units like DSP, it is very important to ensure vector load/store operations alignment of memory blocks, and minimize space wastage when making memory allocations. In this paper, we design and implement a memory management method, vector memory pool, suitable for embedded vector processors. By partitioning an entire block of memory space into many aligned vector objects and making efficiently use of vector processing units, the processing of memory manipulation library functions such as memset/memcpy is accelerated. The implementation and comparative verification of vector memory pool on RT-Thread Nano based on SWIFT DSP was completed, and the running efficiency reached a tens of times improvement compared to the original method.
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Acknowledgement
The authors thank the editors and the anonymous reviewers for their invaluable comments to help to improve the quality of this paper. This work was supported by National Key R&D Program of China under Grant 2020YFA0711400, National Natural Science Foundation of China under Grants 61831018 and U21A20452, the Outstanding youth project of Natural Science Foundation of Jiangxi Province 20212ACB212001, and the Jiangxi Double Thousand Plan under Grant jxsq2019201125.
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© 2023 ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering
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Li, S., Ren, H., Zhang, Z., Tan, B., Wu, J. (2023). An Efficient Memory Management Method for Embedded Vector Processors. In: Gao, F., Wu, J., Li, Y., Gao, H. (eds) Communications and Networking. ChinaCom 2022. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 500. Springer, Cham. https://doi.org/10.1007/978-3-031-34790-0_19
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DOI: https://doi.org/10.1007/978-3-031-34790-0_19
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