Abstract
Applications of digital signal processor (DSP) involve large amounts of data processing. In order to be able to improve the speed of DSP application development, it is necessary to be able to implement debugging functions that can support File I/O at a small cost of modification. This paper proposes a complete set of implementation methods of the semihosting debugging function on a DSP without an operating system, including hardware support and software algorithms. On hardware, this article adds only one self-trapping instruction to support semihosting debugging. In software, this article is based on the GDB File I/O extension protocol to design and implement the debugging agent software and C language library underlying file operations. And after optimizing library files and application source code, the I/O speed of the architecture can meet users’ debugging needs. This solution can realize the semihosting debugging function for DSP chip at a low cost and has good performance. Therefore, provides more powerful debugging functions for DSP application development. In assembly level debugging, observing the execution of each assembly instruction can also verify the instruction execution of the chip itself. The addition of file operation can greatly validate the chip with larger data.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Kuschnero, V.M., Schaedler, M., Bluemm, C., et al.: Advances in deep learning for digital signal processing in coherent optical modems. In: Optical Fiber Communication Conference (2020)
Austin, T., Larson, E., et al.: SimpleScalar: an infrastructure for computer system modeling. Computer 35, 59–67 (2002)
Nadal, J., Baghdadi, A.: Parallel and flexible 5G LDPC decoder architecture targeting FPGA. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 29(6), 1141–1151 (2021). https://doi.org/10.1109/TVLSI.2021.3072866
Weng, O., Khodamoradi, A., Kastner, R.: Hardware-efficient residual networks for FPGAs (2021)
Berger, A.S.: An overview of the tools for embedded design and debug (2020)
Berger, A.S.: Best practices for debugging embedded software (2020)
Hossain, F., Iry, J., Kulkami, N., et al.: Method and system for remote debug protocol proxying for production debugging; selective session and user routing for debugging in multi-tenant cloud computing infrastructure. US (2014)
Prado, B., Dantas, D., Bispo, K., et al.: A virtual prototype semihosting approach for early simulation of cyber-physical systems. In: 2018 IEEE Symposium on Computers and Communications (ISCC). IEEE (2018)
Chance, G., Ghobrial, A., Mcareavey, K., et al.: On determinism of game engines used for simulation-based autonomous vehicle verification (2021)
Lee, H., Hyunggoy, Oh., Kang, S.: On-chip error detection reusing built-in self-repair for silicon debug. IEEE Access 9, 56443–56456 (2021). https://doi.org/10.1109/ACCESS.2021.3071517
Mitra, S., Barrett, C., Lin, D., et al.: Post-silicon validation and debug using symbolic quick error detection (2018)
Cao, Y., Hao, Z., Palombo, H., et al.: A post-silicon trace analysis approach for system-on-chip protocol debug. In: 2017 IEEE 35th International Conference on Computer Design (ICCD). IEEE (2017)
Merten, M., Huhn, S., Drechsler, R.: A codeword-based compactor for on-chip generated debug data using two-stage artificial neural networks. In: 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp. 1–6. IEEE (2021)
Petrović, P.B.: A new electronically controlled floating/grounded meminductor emulator based on single MO-VDTA. Analog Integr. Circuits Signal Process. 110, 185–195 (2021)
Minati, L., Mancinelli, M., Frasca, M., et al.: An analog electronic emulator of non-linear dynamics in optical microring resonators. Chaos Solitons Fractals 153, 111410 (2021)
Kumar, V., Dubey, S.K., Islam, A.: A Current-Mode Memristor Emulator Circuit (2020)
Barboni, L.: A passive circuit-emulator for a current-controlled memristor (2020)
Zhu, M., Wang, C., Deng, Q., et al.: Locally active memristor with three coexisting pinched hysteresis loops and its emulator circuit. Int. J. Bifurcation Chaos (2020)
Berger, A., Barr, M., et al.: On-chip debug. Embed. Syst. Program. (2003)
Berger, A.S.: On-chip debugging resources (2020)
Backer, J., Hely, D., Karri, R.: Secure design-for-debug for systems-on-chip. In: Test Conference. IEEE (2015)
Yiu, J.: Input and output software examples - ScienceDirect. The Definitive Guide to ARM® CORTEX®-M3 and CORTEX®-M4 Processors (Third Edition), pp. 583–604 (2014)
Yiu, J.: Getting Started with the ARM RealView Development Suite. Elsevier Inc. (2011)
Uzan, D., Kahn, R., Weiss, S.: Perceptron based filtering of futile prefetches in embedded VLIW DSPs. J. Syst. Architect. 110(3), 101826 (2020)
Acknowledgment
The authors thank the editors and the anonymous reviewers for their invaluable comments to help to improve the quality of this paper. This work was supported by the Key-Area Research and Development Program of Guangdong Province under Grant 2018B010115002, National Natural Science Foundation of China under Grants 61831018 and U21A20452, the Outstanding youth project of Natural Science Foundation of Jiangxi Province 20212ACB212001, and the S&T plan projects of Jiangxi Province Education Department GJJ201003.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2023 ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering
About this paper
Cite this paper
Huang, T., Ren, H., Zhang, Z., Tan, B., Wu, J. (2023). A Low-Cost Semihosting Approach to Debug DSP Application. In: Gao, F., Wu, J., Li, Y., Gao, H. (eds) Communications and Networking. ChinaCom 2022. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 500. Springer, Cham. https://doi.org/10.1007/978-3-031-34790-0_3
Download citation
DOI: https://doi.org/10.1007/978-3-031-34790-0_3
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-34789-4
Online ISBN: 978-3-031-34790-0
eBook Packages: Computer ScienceComputer Science (R0)