Abstract
This research topic aims to investigate system models and hardware architectures of Computed Tomography scanners to provide the plug-and-play capability to add new internal components and to process images in real-time to meet requirements for interventional procedures. For this purpose, different medical requirements have been investigated, considering their implications for system and hardware designers. Based on these preliminary results, a new control data acquisition system architecture for MPSoC FPGAs has been proposed. This architecture is designed to control/synchronize all CT components and to collect and process data on-the-fly. A CT architectural model, a configurable dataflow architecture for data acquisition, a mixed-precision image data processing core, and a mechanism to support isolation on MPSoC-FPGAs have been proposed for this scope. Finally, these results were used to assemble an open-interface CT scanner, where the proposed architecture was validated and evaluated in terms of plug-and-play capability, timing, and hardware performance.
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Passaretti, D., Pionteck, T. (2023). A Control Data Acquisition System Architecture for MPSoC-FPGAs in Computed Tomography. In: Palumbo, F., Keramidas, G., Voros, N., Diniz, P.C. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2023. Lecture Notes in Computer Science, vol 14251. Springer, Cham. https://doi.org/10.1007/978-3-031-42921-7_25
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DOI: https://doi.org/10.1007/978-3-031-42921-7_25
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