Abstract
The human brain and its ability to associate is one of the most fascinating things in nature. The long-known concept of binary neural associative memory offers the possibility to build a very simple hardware architecture, that allows direct association. In a BINAM the presented input is associated with the stored content of the memory, without the need for addressing. Hereby the BINAM is a fault-tolerant concept, which allows that erroneous input vectors will usually result in a correct output. In this work, we propose a modern hardware architecture of a BINAM on the VCU1525 FPGA board. We implemented the architecture in VHDL as a scalable, modular, generic, and easy to use design. For the evaluation designs in the range of 8,000 to 740,000 neurons, with equal input and output vector size, have been generated and tested on the FPGA board. Currently, a maximum clock frequency of \(\sim \)200 MHz with a resource utilization of only \(\sim \)33% CLBs\(, \sim \)22% LUTs, and \(\sim \)10% registers can be achieved. Maximum times for the storage and association process for all designs are stated in this paper.
M. Kortekamp and S. Pilz—These authors contributed equally to this work.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Azevedo, F.A., et al.: Equal numbers of neuronal and nonneuronal cells make the human brain an isometrically scaled-up primate brain. J. Comparat. Neurol. 513(5), 532–541 (2009)
Drachman, D.A.: Do we have brain to spare? (2005)
Hebb, D.O.: The organization of behavior: a neuropsychological theory. Psychology Press (2005)
Herculano-Houzel, S.: The human brain in numbers: a linearly scaled-up primate brain. Front. Hum. Neurosci. 3, 31 (2009)
Kaufman, S.B., DeYoung, C.G., Gray, J.R., Brown, J., Mackintosh, N.: Associative learning predicts intelligence above and beyond working memory and processing speed. Intelligence 37(4), 374–382 (2009)
Kohonen, T.: Content-addressable memories. 1st Edn. Springer Berlin, Heidelberg (1980). https://doi.org/10.1007/978-3-642-96552-4
Kohonen, T.: Self-organization and associative memory, vol. 8. 3rd Edn. Springer Berlin, Heidelberg (2012). https://doi.org/10.1007/978-3-642-88163-3
Neisser, U., et al.: Intelligence: knowns and unknowns. Am. Psychol. 51(2), 77 (1996)
Palm, G.: On associative memory. Biol. Cybern. 36, 19–31 (1980). https://doi.org/10.1002/andp.19053221004
Palm, G.: Assoziatives gedächtnis und gehirntheorie. Spektrum der Wissenschaft 6, 54–64 (1988)
Palm, G.: On the asymptotic information storage capacity of neural networks. In: Eckmiller, R., van der Malsburg, C. (eds.) Neural Computers. Springer Study Edition, vol. 41, pp. 271–280. Springer, Heidelberg (1989). https://doi.org/10.1007/978-3-642-83740-1_29
Palm, G.: Neural assemblies. 1st Edn. Springer, Heidelberg (1982). https://doi.org/10.1007/978-3-642-81792-2
Palm, G., Sommer, F.T.: Associative data storage and retrieval in neural networks. Models of Neural Networks III: Association, Generalization, and Representation, pp. 79–118 (1996)
Palm, G.: Neural associative memories and sparse coding. Neural Netw. 37, 165–171 (2013). https://doi.org/10.1016/j.neunet.2012.08.013. https://www.sciencedirect.com/science/article/pii/S0893608012002298. Twenty-fifth Anniversay Commemorative Issue
Pilz, S., Hellweg, T., Harteis, C., Rückert, U., Schneider, M.: who will own our global digital twin: the power of genetic and biographic information to shape our lives. In: Gräßler, I., Maier, G.W., Steffen, E., Roesmann, D. (eds.) The Digital Twin of Humans, pp. 11–35. Springer, Cham(2023). https://doi.org/10.1007/978-3-031-26104-6_2
Rückert, U., Funke, A., Pintaske, C.: Acceleratorboard for neural associative memories. Neurocomputing 5(1), 39–49 (1993)
Rückert, U., Kleerbaum, C., Goser, K.: Digital VLSI implementations of an associative memory based on neural networks. In: Delgado-Frias, J.G., Moore, W.R. (eds.) VLSI for Artificial Intelligence and Neural Networks, pp. 275–284 . Springer, Boston, MA (1991). https://doi.org/10.1007/978-1-4615-3752-6_27
Rückert, U., Rüping, S., Naroska, E.: Parallel implementation of neural associative memories on RISC processors. In: Delgado-Frias, J.G., Moore, W.R. (eds.) VLSI for Neural Networks and Artificial Intelligence, pp. 167–176. Springer, Boston, MA (1994). https://doi.org/10.1007/978-1-4899-1331-9_17
Rückert, U., Surmann, H.: Tolerance of a binary associative memory towards stuck-at-faults. In: Artificial Neural Networks, pp. 1195–1198. Elsevier (1991)
XILINX: VCU1525 reconfigurable acceleration platform - UG1268 (v1.5) (2019). https://docs.xilinx.com/v/u/en-US/ug1268-vcu1525-reconfig-accel-platform. Accessed 14 May 2022
Zuse, K.: Der plankalkül (1972)
Acknowledgments
This publication incorporates results from the VEDLIoT project, which received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement number 957197. Also, Sarah Pilz and Ulrich Rückert were members of the research programme ‘Design of Flexible Work Environments-Human-Centric Use of Cyber-Physical Systems in Industry 4.0’, which is supported by the North-Rhine-Westphalian funding scheme ‘Forschungskolleg’.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2023 The Author(s), under exclusive license to Springer Nature Switzerland AG
About this paper
Cite this paper
Kortekamp, M., Pilz, S., Hagemeyer, J., Rückert, U. (2023). A Scalable Binary Neural Associative Memory on FPGA. In: Rojas, I., Joya, G., Catala, A. (eds) Advances in Computational Intelligence. IWANN 2023. Lecture Notes in Computer Science, vol 14134. Springer, Cham. https://doi.org/10.1007/978-3-031-43085-5_30
Download citation
DOI: https://doi.org/10.1007/978-3-031-43085-5_30
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-031-43084-8
Online ISBN: 978-3-031-43085-5
eBook Packages: Computer ScienceComputer Science (R0)