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Predicting Memory Demands of BDD Operations Using Maximum Graph Cuts

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Automated Technology for Verification and Analysis (ATVA 2023)

Abstract

The BDD package Adiar manipulates Binary Decision Diagrams (BDDs) in external memory. This enables handling big BDDs, but the performance suffers when dealing with moderate-sized BDDs. This is mostly due to initializing expensive external memory data structures, even if their contents can fit entirely inside internal memory.

The contents of these auxiliary data structures always correspond to a graph cut in an input or output BDD. Specifically, these cuts respect the levels of the BDD. We formalise the shape of these cuts and prove sound upper bounds on their maximum size for each BDD operation.

We have implemented these upper bounds within Adiar. With these bounds, it can predict whether a faster internal memory variant of the auxiliary data structures can be used. In practice, this improves Adiar’s running time across the board. Specifically for the moderate-sized BDDs, this results in an average reduction of the computation time by \(86.1\%\) (median of \(89.7\%\)). In some cases, the difference is even \(99.9\%\). When checking equivalence of hardware circuits from the EPFL Benchmark Suite, for one of the instances the time was decreased by 52 h.

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Acknowledgements

We want to thank Anna Blume Jakobsen for her help implementing the use of i-level cuts in Adiar and Kristoffer Arnsfelt Hansen for his input on the computational complexity of these cuts. Finally, thanks to the Centre for Scientific Computing, Aarhus, (phys.au.dk/forskning/cscaa/) for running our benchmarks.

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Correspondence to Steffan Christ Sølvsten .

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Sølvsten, S.C., van de Pol, J. (2023). Predicting Memory Demands of BDD Operations Using Maximum Graph Cuts. In: André, É., Sun, J. (eds) Automated Technology for Verification and Analysis. ATVA 2023. Lecture Notes in Computer Science, vol 14216. Springer, Cham. https://doi.org/10.1007/978-3-031-45332-8_4

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