Abstract
Stream processing applications are becoming increasingly complex, requiring parallel and adaptable architectures under real-time constraints. Currently, selecting appropriate computing platforms for these applications is done manually through prototyping and benchmarking. To simplify this selection process, Dataflow (DF) modeling has been utilized to identify opportunities for parallelism. This approach utilizes the Algorithm Architecture “Adequation” (AAA) methodology to make efficient decisions at compile-time by considering data movement and scheduling needs in stream processing environments.
This paper presents a new architecture named “Scratchy”, that is specially designed for stream processing applications. Scratchy is a multi-RISC-V architecture that features software-managed communication using scratchpad memories and customizable interconnect topologies. The architecture supports different topology options and is demonstrated using a 3-core Scratchy. The capabilities of the architecture are presented through a design space exploration that focuses on optimizing the topology for specific applications. It also highlights the low resource overhead of the architecture and quick synthesis time on an Intel MAX10.
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Faye, J.W. et al. (2024). Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications. In: Dias, T., Busia, P. (eds) Design and Architectures for Signal and Image Processing. DASIP 2024. Lecture Notes in Computer Science, vol 14622. Springer, Cham. https://doi.org/10.1007/978-3-031-62874-0_6
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