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Specifying and Verifying a Real-World Packet Error-Correction System

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Verified Software. Theories, Tools and Experiments (VSTTE 2023)

Abstract

Automated and semi-automated formal methods have been widely employed to verify properties of network models and per-packet network functions, which operate on single packets in the middle of a network (firewall, NAT, etc.). But these methods do not extend to end-to-end network functions, those whose specification relates a stream of packets sent at one endpoint of the network with a stream received at the other end. Among other complications, such specifications must account for the network’s behavior, including packet reordering, duplication, delay, and loss. We develop a methodology for formally specifying and verifying such code, demonstrating our techniques on a real-world packet error-correction system that encounters all of these challenges and whose specification had been highly unclear. We prove a close model of this system correct in the Coq proof assistant; along the way, we formalize more general networking constructs including IP/UDP packets, a metric for packet reordering, and sequence number comparison. Finally, through our specification, we develop an improved version of the error-correction system, giving a more predictable, provably correct program that recovers more packets. We show that formal specification and verification can be powerful tools to clarify assumptions, improve code quality, and find and fix bugs in complex, real-world systems.

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Notes

  1. 1.

    See Cohen, et al. [12] for a more detailed history of this algorithm.

  2. 2.

    This implementation uses a custom sequence number that counts packets, not bytes.

  3. 3.

    This is a safe assumption. At gigabit speeds, even if each packet were only 1 bit, wraparound would only occur after 250 years. Alternatively, we could assume weak bounds on reordering, duplication, etc. to ensure that sequence numbers are never ambiguous. But we would like Property 3 to hold under any network behavior.

  4. 4.

    This loss condition is not ideal: it reveals the batch structure of the FEC algorithm. However, other formulations (for example, that k out of every \(k+h\) consecutive packets are received) are overly restrictive or do not correctly capture the condition.

  5. 5.

    The k and h bounds arise from the FEC algorithm.

  6. 6.

    We use 32-bit as an example; our proofs are generic and we also need the 64-bit case.

  7. 7.

    The Producer only compares integers between 0 and 256; wraparound is impossible.

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Acknowledgment

This material is based upon work supported by the Defense Advanced Research Projects Agency (DARPA) under Contract No. HR001120C0160.

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Correspondence to Joshua M. Cohen .

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Cohen, J.M., Appel, A.W. (2024). Specifying and Verifying a Real-World Packet Error-Correction System. In: Reynolds, A., Tasiran, S. (eds) Verified Software. Theories, Tools and Experiments. VSTTE 2023. Lecture Notes in Computer Science, vol 14095. Springer, Cham. https://doi.org/10.1007/978-3-031-66064-1_4

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