Parallel Assembly Synthesis

Abstract

Program synthesis offers an attractive alternative to the intricate and tedious process of writing assembly programs manually. Assembly program synthesis automatically generates implementations, given a high-level formal specification and a machine description. However, its limited scalability prevents widespread adoption. Automatic parallelization improves program synthesis in general, but parallelizing assembly synthesis is nontrivial as the realities that data are untyped and all state is global lead to an enormous search space and prevent straightforward decomposition into separable sub-problems that can be run in parallel. We present PASSES, a Parallel Assembly Synthesis System Exploiting Subspaces. PASSES uses five heuristics to transform an original assembly synthesis problem into a set of sub-problems; it runs multiple synthesis sub-problems in parallel and constructs the final result by combining them. We evaluate PASSES on 26 general bit manipulation assembly programming problems and 140 machine-dependent use cases from two operating systems. Compared to an existing assembly synthesis tool and a state-of-the-art parallel SMT solver, all five heuristics in PASSES significantly improve assembly synthesis scalability.

Appendices

A PASSES Heuristic Algorithms

1.1 A.1 PASSES Algorithm

Algorithm 1 shows pseudo code for PASSES. It first initializes the list of instances with different heuristics in line 4 and then parallelizes the synthesis for each instance in line 5, by invoking multiple individual synthesizers. Given the specification, a machine model, and a list of constraints, in function synth_instance (lines 9–15), Synthesizer either successfully generates a target program prog in line 12 or gets a synthesis failure in line 13. Depending on the heuristic, PASSES handles the failure differently as shown in line 15. PASSES executes all running instances in parallel, and if one of them successfully produces a program, it returns the first result in line 7; otherwise, it waits until all instances finish with a synthesis failure in line 8.

1.2 A.2 Constraint-SC Algorithm

Algorithm 2 shows the pseudo code for the instance initialization in Constraint-SC. In this code example, we initialize synthesis instances by forcing the first instruction in the target program to be different types (lines 3–4); one could imagine creating more detailed subspaces with constraints on other instruction locations, which further prunes the search space, expediting synthesis. In Sect. 5, we first apply instruction type constraints on the first instruction location. Since different instruction types can contain different numbers of instructions, and there are six categories of instruction types, to enable parallelism with more synthesis sub-problems and encourage subspace size equality, we take the cross product of the types of the first two instructions to produce $6^2 = 36$ groups, and merge parts of them to create groups with roughly equal sizes.

1.3 A.3 Simpl-SC Basic Algorithm

Algorithm 3 shows the pseudo code for the instance initialization in Simpl-SC. We first divide the given complete machine model, complete-model, into a list of models with smaller instruction sets, sub-models, in line 2; each sub-model represents a subspace of the search space of the original synthesis problem;. We discuss model division in more detail later in this section. We refer to the synthesis problems for these sub-models as sub-model instances in line 4.

To preserve collective exhaustivity, Simpl-SC also adds a single synthesis instance with the complete-model, referred to as the complete-model instance (line 6), which allows the synthesizer to explore other available search spaces in the original problem. In other words, this guarantees that all subspaces explored by the complete-model and sub-model instances, exhaustively cover the entire search space. To avoid duplicate searches, we generate a set of mutually exclusive constraints (line 5) and apply them to the complete-model instance; those constraints force the synthesizer to produce a program with one or more instructions outside all possible sub-models. With those constraints, the complete-model instance precludes all subspaces searched by the sub-model instances and minimizes overlaps in the search spaces. Note that the complete-model instance preserves mutual exclusivity from all other sub-model instances, while those sub-model instances may not be mutually exclusive from each other.

1.4 A.4 Inc-SC Algorithm

Algorithm 4 shows the pseudo code for the function synth_instance in Inc-SC with synthesis failure handling shown in lines 5–10. Inc-SC first enlarges the machine model used in the failed instance into a list of new models (line 7) and then creates new instances with enlarged models and mutually exclusive constraints (lines 8–10). The model enlargement extends the given model with at least one more different instruction type from the complete machine model; in other words, whenever there is an instance with a x-type ($x \ge 2$) model failure, Inc-SC enlarges this x-type model into several $(x+1)$-type models and launches the corresponding sub-model instances in parallel. The mutually exclusive constraints (line 9) guarantee that the target program cannot be synthesized with only x instruction types, i.e., the target program must include all $(x+1)$ types in its enlarged model; they utilize mutual exclusivity to assure that the search space explored by previously failed instances will not be reconsidered. Compared with the original complete-model, these enlarged models are still relatively smaller and their sub-model instances are easier to be evaluated by the synthesizer. Note that though Inc-SC does not preserve collective exhaustivity at the beginning, given that there may exist multiple programs that satisfy the specification, incremental model enlargement ensures that the solution will be eventually found.

Fig. 4.

Bit manipulation benchmark examples (26 in total).

B Bit Manipulation Benchmark Examples

Figure 4 describes all the examples we used. The examples, numbered P1a – P14b, are grouped by similarity. Some examples include signed or unsigned comparisons, such as P11a and P14a, while others involve shifting with 0-fill (logical shift) or sign-fill (arithmetic shift), such as P8a and P12a. We mark the type over each comparison and shift symbol.

Table 5 reports the number of instructions in each synthesized implementation by Aquarium, indicating the minimum length requirement for each benchmark.

Table 5. Size of the bit manipulation benchmarks with MIPS implementations (lines of code).