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MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor

–Overhead Evaluation of Side-Channel Countermeasures–

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Reconfigurable Computing: Architectures, Tools, and Applications (ARC 2014)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 8405))

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Abstract

In this work we present a lightweight co-processor for asymmetric cryptography. While focusing on standardized elliptic curve cryptography over prime fields, the architecture has been chosen generic enough to also allow to perform RSA operations on the same hardware. Compared to previous work our processor distinguishes itself by not only having on par performance with recent work in this field, but also by being able to additionally apply state of the art side-channel analysis countermeasures to protect the implementation against timing and power analysis attacks. Different countermeasures can be dynamically selected at runtime, allowing a flexible trade-off between security and performance. Utilizing a specialized 32-bit ALU and a microcode-based control unit, it is possible to easily reprogram the controller after deployment allowing to make changes to the implemented algorithm or countermeasures by updating the microcode. This allows to keep some of the reconfigurability of FPGA-based designs even when fabricating the proposed core as an ASIC.

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Pöpper, C., Mischke, O., Güneysu, T. (2014). MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor. In: Goehringer, D., Santambrogio, M.D., Cardoso, J.M.P., Bertels, K. (eds) Reconfigurable Computing: Architectures, Tools, and Applications. ARC 2014. Lecture Notes in Computer Science, vol 8405. Springer, Cham. https://doi.org/10.1007/978-3-319-05960-0_24

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  • DOI: https://doi.org/10.1007/978-3-319-05960-0_24

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-05959-4

  • Online ISBN: 978-3-319-05960-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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