Abstract
Memory bandwidth is a major resource which is shared among all CPU cores. The development speed of memory bandwidth cannot catch up with the increasing number of CPU cores. Thus, the contention for occupying more memory bandwidth among concurrently executing tasks occurs. In this paper, we have presented Bubble Task method which mitigates memory contention via throttling technique. We made a memory contention modeling for dynamically deciding throttling ratio and implemented both software and hardware versions to present trade-off between fine-grained adjustment and stable fairness. Bubble Task can lead to performance improvement in STREAM benchmark suite which is one of the most memory hungry benchmark by 21 % and fairness in memory bandwidth sharing among SPEC CPU 2006 applications which have different memory access patterns.
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References
http://www.neoseeker.com/news/15313-1000-core-processor-possible-says-intel/
Patterson, D.: Latency lags bandwidth. In: Communication of the ACM (2004)
Zhuravlev, S., Blagodurov, S., Fedorova, A.: Addressing shared resource contention in multicore processors via Scheduling. In: ASPLOS (2010)
Zhuravlev, S., Saez, J.C., Blagodurov, S., Fedorova, A.: Survey of scheduling techniques for addressing shared resources in multicore processors. In: ACM Computing Surveys, September 2011
Kim, S., Eom, H., Yeom, H.Y.: Virtual machine consilidation based on interference modeling. J. Supercomput. 64, 28–37 (2013)
Merkel, A., Stoess, H., Bellosa, F.: Resource-conscious scheduling for energy efficiency on multicore processors. In: EuroSys (2010)
Jiang, Y., Shen, X., Chen, J., Tripathi, R.: Analysis and approximation of optimal co-scheduling on chip multiprocessors. In: PACT (2008)
Xie, Y., Loh, G.: Dynamic classification of program memory behaviors in CMPs. In: Proceedings of CMP-MSI, held in conjunction with ISCA (2008)
Ahn, J., Kim, C., Han, J.: Dynamic virtual machine scheduling in clouds for architectural shared resources. In: HotCloud (2012)
Chandra, D., Guo, F., Kim, S., Solihin, Y.: Predicting interthread cache contention on a chip multi-processor architecture. In: HPCA (2005)
Zhang, X., Dwarkadas, S., Shen, K.: Hardware execution throttling for multi-core resource management. In: ATC (2009)
Naveh, A., Rotem, E., Mendelson, A., Gochman, S., Chabukswar, R., Krishnan, K., Kumar, A.: Power and thermal management in the Intel Core Duo processor. Intel Technol. J. 10(2), 109–122 (2006)
Fedorova, A., Seltzer, M., Smith, M.: Improving performance isolation on chip multiprocessors via an operating system scheduler. In: 16th International Conference on Parallel Architecture and Compilation Techniques, pp. 25–36. Brasov, Romania, September 2007
Mars, J., Tang, L., Hundt, R., Skdron, K., Soffa, M.L.: Bubble-up: increasing utilization in modern warehouse scale computers via sensible co-locations. In: MICRO (2011)
Intel(R) 64 and IA-32 Arhcitectures Software Develper’s Manual, Volume 3B. System Programming Guide, Part 2
Acknowledgment
This work was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2013R1A1A2064629), Next-Generation Information Computing Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT&Future Planning (No. 2010-0020731), and Educational-Industrial Cooperation Project sponsored by Samsung Electronics DMC R&D Center.
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Seo, D., Kim, M., Eom, H., Yeom, H.Y. (2015). Bubble Task: A Dynamic Execution Throttling Method for Multi-core Resource Management. In: Cirne, W., Desai, N. (eds) Job Scheduling Strategies for Parallel Processing. JSSPP 2014. Lecture Notes in Computer Science(), vol 8828. Springer, Cham. https://doi.org/10.1007/978-3-319-15789-4_1
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DOI: https://doi.org/10.1007/978-3-319-15789-4_1
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