Skip to main content

Bubble Task: A Dynamic Execution Throttling Method for Multi-core Resource Management

  • Conference paper
  • First Online:
Book cover Job Scheduling Strategies for Parallel Processing (JSSPP 2014)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 8828))

Included in the following conference series:

  • 621 Accesses

Abstract

Memory bandwidth is a major resource which is shared among all CPU cores. The development speed of memory bandwidth cannot catch up with the increasing number of CPU cores. Thus, the contention for occupying more memory bandwidth among concurrently executing tasks occurs. In this paper, we have presented Bubble Task method which mitigates memory contention via throttling technique. We made a memory contention modeling for dynamically deciding throttling ratio and implemented both software and hardware versions to present trade-off between fine-grained adjustment and stable fairness. Bubble Task can lead to performance improvement in STREAM benchmark suite which is one of the most memory hungry benchmark by 21 % and fairness in memory bandwidth sharing among SPEC CPU 2006 applications which have different memory access patterns.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 34.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 44.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. http://www.neoseeker.com/news/15313-1000-core-processor-possible-says-intel/

  2. http://ark.intel.com/products/

  3. Patterson, D.: Latency lags bandwidth. In: Communication of the ACM (2004)

    Google Scholar 

  4. Zhuravlev, S., Blagodurov, S., Fedorova, A.: Addressing shared resource contention in multicore processors via Scheduling. In: ASPLOS (2010)

    Google Scholar 

  5. Zhuravlev, S., Saez, J.C., Blagodurov, S., Fedorova, A.: Survey of scheduling techniques for addressing shared resources in multicore processors. In: ACM Computing Surveys, September 2011

    Google Scholar 

  6. Kim, S., Eom, H., Yeom, H.Y.: Virtual machine consilidation based on interference modeling. J. Supercomput. 64, 28–37 (2013)

    Article  Google Scholar 

  7. Merkel, A., Stoess, H., Bellosa, F.: Resource-conscious scheduling for energy efficiency on multicore processors. In: EuroSys (2010)

    Google Scholar 

  8. Jiang, Y., Shen, X., Chen, J., Tripathi, R.: Analysis and approximation of optimal co-scheduling on chip multiprocessors. In: PACT (2008)

    Google Scholar 

  9. Xie, Y., Loh, G.: Dynamic classification of program memory behaviors in CMPs. In: Proceedings of CMP-MSI, held in conjunction with ISCA (2008)

    Google Scholar 

  10. Ahn, J., Kim, C., Han, J.: Dynamic virtual machine scheduling in clouds for architectural shared resources. In: HotCloud (2012)

    Google Scholar 

  11. Chandra, D., Guo, F., Kim, S., Solihin, Y.: Predicting interthread cache contention on a chip multi-processor architecture. In: HPCA (2005)

    Google Scholar 

  12. Zhang, X., Dwarkadas, S., Shen, K.: Hardware execution throttling for multi-core resource management. In: ATC (2009)

    Google Scholar 

  13. Naveh, A., Rotem, E., Mendelson, A., Gochman, S., Chabukswar, R., Krishnan, K., Kumar, A.: Power and thermal management in the Intel Core Duo processor. Intel Technol. J. 10(2), 109–122 (2006)

    Article  Google Scholar 

  14. Fedorova, A., Seltzer, M., Smith, M.: Improving performance isolation on chip multiprocessors via an operating system scheduler. In: 16th International Conference on Parallel Architecture and Compilation Techniques, pp. 25–36. Brasov, Romania, September 2007

    Google Scholar 

  15. Mars, J., Tang, L., Hundt, R., Skdron, K., Soffa, M.L.: Bubble-up: increasing utilization in modern warehouse scale computers via sensible co-locations. In: MICRO (2011)

    Google Scholar 

  16. http://www.cs.virginia.edu/stream/

  17. http://www.bitmover.com/lmbench/

  18. http://software.intel.com/en-us/articles/detecting-memory-bandwidth-saturation-in-threaded-applications

  19. Intel(R) 64 and IA-32 Arhcitectures Software Develper’s Manual, Volume 3B. System Programming Guide, Part 2

    Google Scholar 

  20. http://www.spec.org/cpu2006/

Download references

Acknowledgment

This work was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2013R1A1A2064629), Next-Generation Information Computing Development Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT&Future Planning (No. 2010-0020731), and Educational-Industrial Cooperation Project sponsored by Samsung Electronics DMC R&D Center.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Hyeonsang Eom .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2015 Springer International Publishing Switzerland

About this paper

Cite this paper

Seo, D., Kim, M., Eom, H., Yeom, H.Y. (2015). Bubble Task: A Dynamic Execution Throttling Method for Multi-core Resource Management. In: Cirne, W., Desai, N. (eds) Job Scheduling Strategies for Parallel Processing. JSSPP 2014. Lecture Notes in Computer Science(), vol 8828. Springer, Cham. https://doi.org/10.1007/978-3-319-15789-4_1

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-15789-4_1

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-15788-7

  • Online ISBN: 978-3-319-15789-4

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics