Abstract
In this paper we discuss porting a particle transport code, which is based on a wavefront sweep algorithm, to FPGA. The original code is written in Fortran90. We describe the key differences between general purpose CPUs and Field Programmable Gate Arrays (FPGAs) and provide a detailed performance model of the FPGA. We describe the steps we took when porting the Fortran90 code to FPGA. Finally, the paper will present results from an extensive benchmarking exercise using a Virtex 6 FPGA.
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Notes
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The code can be downloaded from http://wwwc3.lanl.gov/pal/software/sweep3d.
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Panourgias, I., Weiland, M., Parsons, M., Turland, D., Barrett, D., Gaudin, W. (2015). Feasibility Study of Porting a Particle Transport Code to FPGA. In: Kunkel, J., Ludwig, T. (eds) High Performance Computing. ISC High Performance 2015. Lecture Notes in Computer Science(), vol 9137. Springer, Cham. https://doi.org/10.1007/978-3-319-20119-1_11
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DOI: https://doi.org/10.1007/978-3-319-20119-1_11
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