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Effect of Bias Temperature Instability on Soft Error Rate

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Algorithms and Architectures for Parallel Processing (ICA3PP 2015)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 9532))

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Abstract

Aging and soft errors have become the two most critical reliability issues for nano-scaled CMOS designs. With the decreasing of device sizes the aging effect cannot be ignored during soft error rate (SER) estimation. In this paper, firstly the aging effect due to bias temperature instability (BTI) is analyzed on circuits using 32-nm CMOS technology for soft errors. Secondly, we derive an accurate SER estimation model which can incorporate BTI impact, including the negative BTI impact on PMOS and the positive BTI impact on NMOS. This model computes the failures in time (FIT) rate of sequential circuits. Experiments are carried on ISCAS89 circuits, and two findings are discovered: (1) for ten years simulation operating time, the maximum SER difference can go up to 12.5 % caused by BTI impact; (2) the BTI-aware SER grows quickly during the early operating time, and grows slowly in the later years.

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Acknowledgments

This work is supported by National Natural Science Foundation of China (Grant No. 61432017) and the Excellent University Young Teachers Training Program of Shanghai Municipal Education Commission (No. ZZsdl15104).

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Authors and Affiliations

  1. School of Computer Science and Technology, Shanghai University of Electric Power, Shanghai, 200090, China

    Zhen Wang

  2. School of Software Engineering, Tongji University, Shanghai, 201804, China

    Jianhui Jiang

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  1. Zhen Wang
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  2. Jianhui Jiang
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Corresponding author

Correspondence to Zhen Wang .

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Editors and Affiliations

  1. Central South University, Changsha, China

    Guojin Wang

  2. Sch of Information Technologies, Sydney University, Sydney, New South Wales, Australia

    Albert Zomaya

  3. Department of Information and Commu, University of Murcia, Murcia, Murcia, Spain

    Gregorio Martinez

  4. Changsha, China

    Kenli Li

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Wang, Z., Jiang, J. (2015). Effect of Bias Temperature Instability on Soft Error Rate. In: Wang, G., Zomaya, A., Martinez, G., Li, K. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2015. Lecture Notes in Computer Science(), vol 9532. Springer, Cham. https://doi.org/10.1007/978-3-319-27161-3_67

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  • DOI: https://doi.org/10.1007/978-3-319-27161-3_67

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-27160-6

  • Online ISBN: 978-3-319-27161-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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