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Implementing Cryptographic Pairings on Accumulator Based Smart Card Architectures

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Mathematical Aspects of Computer and Information Sciences (MACIS 2015)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 9582))

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Abstract

In this paper, we show how bilinear pairings can be implemented on modern smart card architectures. We do this by providing a memory-efficient implementation of the eta pairing on accumulator based cryptographic coprocessors. We provide timing results for different key-sizes on a state of the art smart card, the Infineon SLE 78. On one hand, our results show that pairings can efficiently be computed on smart cards. On the other hand, our results identify bottlenecks that have to be considered for future smart card designs.

This work was partially supported by the German Ministry of Education and Research, grant 16KIS0062.

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Author information

Authors and Affiliations

  1. University of Paderborn, Paderborn, Germany

    Peter Günther

  2. Wincor Nixdorf International GmbH, Paderborn, Germany

    Volker Krummel

Authors
  1. Peter Günther
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  2. Volker Krummel
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Corresponding author

Correspondence to Peter Günther .

Editor information

Editors and Affiliations

  1. Wilfrid Laurier University, Waterloo, Ontario, Canada

    Ilias S. Kotsireas

  2. Hamburg University of Technology, Hamburg, Germany

    Siegfried M. Rump

  3. New York University, New York, New York, USA

    Chee K. Yap

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Günther, P., Krummel, V. (2016). Implementing Cryptographic Pairings on Accumulator Based Smart Card Architectures. In: Kotsireas, I., Rump, S., Yap, C. (eds) Mathematical Aspects of Computer and Information Sciences. MACIS 2015. Lecture Notes in Computer Science(), vol 9582. Springer, Cham. https://doi.org/10.1007/978-3-319-32859-1_13

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  • DOI: https://doi.org/10.1007/978-3-319-32859-1_13

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-32858-4

  • Online ISBN: 978-3-319-32859-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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