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Redundancy Elimination in the ExaStencils Code Generator

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Algorithms and Architectures for Parallel Processing (ICA3PP 2016)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 10049))

Abstract

Optimizing the performance of compute-bound codes requires, among other techniques, the elimination of redundant computations. The well-known concept of common subexpression elimination can achieve this in parts, and almost every production compiler conducts such an optimization. However, due to the conservative nature of these compilers, an external redundancy elimination can additionally increase the performance. For stencil codes using finite volume discretizations, an extension to eliminate redundancies between loop iterations is also very promising. We integrated both a classic common subexpression elimination and an extended version in the Exastencils code generator and present their impact on a real-world application.

S. Kronawitter—This work is supported by the German Research Foundation (DFG), as part of Priority Programme 1648 “Software for Exascale Computing” in project ExaStencils under contracts RU 422/15 and LE 912/15.

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Notes

  1. 1.

    http://www.exastencils.org.

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Author information

Authors and Affiliations

  1. University of Passau, 94030, Passau, Germany

    Stefan Kronawitter & Christian Lengauer

  2. FAU Erlangen-Nürnberg, 91058, Erlangen, Germany

    Sebastian Kuckuk

Authors
  1. Stefan Kronawitter
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  2. Sebastian Kuckuk
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  3. Christian Lengauer
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Corresponding author

Correspondence to Stefan Kronawitter .

Editor information

Editors and Affiliations

  1. Carlos III University of Madrid, Getafe, Spain

    Jesus Carretero

  2. Carlos III University of Madrid, Getafe, Spain

    Javier Garcia-Blas

  3. Mathematical Support for Computers, N. I. Lobachevsky State University of Nizhny Novgorod, Nizhniy Novgorod, Russia

    Victor Gergel

  4. Research Computing Center (RCC), Moscow State University, Moscow, Russia

    Vladimir Voevodin

  5. Research Computing Center (RCC), Moscow State University, Moscow, Russia

    Iosif Meyerov

  6. E.U. Politécnica, Universidad de Extremaddura, Cáceres, Spain

    Juan A. Rico-Gallego

  7. Ingenieria de Sistemas Informáticos, Universidad de Extremaddura, Cáceres, Spain

    Juan C. Díaz-Martín

  8. Universitat Politécnica de València, Valencia, Spain

    Pedro Alonso

  9. Distributed and Parallel Systems Group, Institute for Computer Science, Innsbruck, Austria

    Juan Durillo

  10. Carlos III University of Madrid, Getafe, Spain

    José Daniel Garcia Sánchez

  11. UCD School of Computer Science, University College Dublin, Dublin, Ireland

    Alexey L. Lastovetsky

  12. University of Calabria, Rende (CS), Italy

    Fabrizio Marozzo

  13. Information Science and Engineering, Central South University, Changsha, Hunan, China

    Qin Liu

  14. Information Science and Engineering, Central South University, Changsha, Hunan, China

    Zakirul Alam Bhuiyan

  15. Ludwig Maximilian University of Munich, Munich, Germany

    Karl Fürlinger

  16. Informatik 10 - Rechnertechnik, Technische Universität München, Munich, Germany

    Josef Weidendorfer

  17. High Performance Computing Center (HLRS), Stuttgart, Germany

    José Gracia

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Kronawitter, S., Kuckuk, S., Lengauer, C. (2016). Redundancy Elimination in the ExaStencils Code Generator. In: Carretero, J., et al. Algorithms and Architectures for Parallel Processing. ICA3PP 2016. Lecture Notes in Computer Science(), vol 10049. Springer, Cham. https://doi.org/10.1007/978-3-319-49956-7_13

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  • DOI: https://doi.org/10.1007/978-3-319-49956-7_13

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-49955-0

  • Online ISBN: 978-3-319-49956-7

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