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International Conference on Wireless and Satellite Systems

WiSATS 2016: Wireless and Satellite Systems pp 73–82Cite as

Bit Synchronization and Delayed Decision Feedback Equalization for EDGE BTS - Hardware Implementation on TMS320C6424 TI DSP

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Abstract

This paper demonstrates the implementation of bit synchronization and delayed decision feedback equalization for Enhanced Data rates for GSM Evolution (EDGE) system on TMS320C6424 DSP. EDGE makes use of training sequence for channel estimation and inter symbol interference (ISI) cancellation by use of delayed decision feedback equalization. Modulated baseband in-phase (I) and quadrature (Q) signals are generated using Agilent E4438C Vector signal generator and faded using Agilent fading simulator, is used as input to the DSP. Bit Error Rate (BER) performance of uncoded bits for Packet Data Traffic Channel (PDTCH) meets the EDGE standards. Software implementation uses fixed-point C and Integrated Development Environment (IDE) used for development is code composer studio (CCS). Prototyped our design in Texas Instrument TMS320C6424 DSP and verified for all propagation models as per the EDGE standards. The design and hardware implementation of this Demodulator is done for C-DOT indigenous Shared GSM Radio Access Network (SGRAN) Base Transceiver Station (BTS) project.

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References

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Authors and Affiliations

  1. Centre for Development of Telematics, Electronic City Phase-1, Hosur Road, Bangalore, 560100, India

    Laxmaiah Pulikanti, Pradeep Goutam, Bipsa Purushothaman, K. G. Dileep & S. V. Hari Prasad

Authors
  1. Laxmaiah Pulikanti
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  2. Pradeep Goutam
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  3. Bipsa Purushothaman
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  4. K. G. Dileep
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  5. S. V. Hari Prasad
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Corresponding author

Correspondence to Laxmaiah Pulikanti .

Editor information

Editors and Affiliations

  1. Faculty of Computing, University of South Wales, Cardiff, United Kingdom

    Ifiok Otung

  2. University of Bradford, Bradford, United Kingdom

    Prashant Pillai

  3. The University of Sheffield , Thessaloniki, Greece

    George Eleftherakis

  4. University of Siena , Siena, Italy

    Giovanni Giambene

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© 2017 ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering

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Pulikanti, L., Goutam, P., Purushothaman, B., Dileep, K.G., Hari Prasad, S.V. (2017). Bit Synchronization and Delayed Decision Feedback Equalization for EDGE BTS - Hardware Implementation on TMS320C6424 TI DSP. In: Otung, I., Pillai, P., Eleftherakis, G., Giambene, G. (eds) Wireless and Satellite Systems. WiSATS 2016. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 186. Springer, Cham. https://doi.org/10.1007/978-3-319-53850-1_9

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  • DOI: https://doi.org/10.1007/978-3-319-53850-1_9

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-53849-5

  • Online ISBN: 978-3-319-53850-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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