Abstract
In this chapter, a brief history of SONOS flash technology is introduced followed by the details of one-transistor SONOS (1Tr-SONOS) technology. Memory-cell structure, basic cell-operation principles and fabrication process are described. Then basic array architecture and read/program/erase operations are explained with corresponding peripheral circuits. A disturb mode in program and erase operations is also discussed. Finally, advanced circuit techniques to expand application range, especially for automotive use with high reliability and low energy consumption are described.
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Mitani, H., Matsubara, K. (2018). SONOS 1Tr eFlash Memory. In: Hidaka, H. (eds) Embedded Flash Memory for Embedded Systems: Technology, Design for Sub-systems, and Innovations. Integrated Circuits and Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-55306-1_6
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DOI: https://doi.org/10.1007/978-3-319-55306-1_6
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