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VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications

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Applied Reconfigurable Computing (ARC 2017)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 10216))

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Abstract

In this paper, we present and evaluate an FPGA acceleration fabric that uses VLIW softcores as processing elements, combined with a memory hierarchy that is designed to stream data between intermediate stages of an image processing pipeline. These pipelines are commonplace in medical applications such as X-ray imagers. By using a streaming memory hierarchy, performance is increased by a factor that depends on the number of stages (\(7.5\times \) when using 4 consecutive filters). Using a Xilinx VC707 board, we are able to place up to 75 cores. A platform of 64 cores can be routed at 193 MHz, achieving real-time performance, while keeping 20% resources available for off-board interfacing.

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References

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Acknowledgment

This research is supported by the ARTEMIS joint undertaking under grant agreement No. 621439 (ALMARVI).

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Correspondence to Joost Hoozemans .

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Hoozemans, J., Heij, R., van Straten, J., Al-Ars, Z. (2017). VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications. In: Wong, S., Beck, A., Bertels, K., Carro, L. (eds) Applied Reconfigurable Computing. ARC 2017. Lecture Notes in Computer Science(), vol 10216. Springer, Cham. https://doi.org/10.1007/978-3-319-56258-2_4

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  • DOI: https://doi.org/10.1007/978-3-319-56258-2_4

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-56257-5

  • Online ISBN: 978-3-319-56258-2

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