Skip to main content

A Novel Design in Formal Verification Corresponding to Mixed Signals by Differential Learning

  • Conference paper
  • First Online:
Software Engineering Trends and Techniques in Intelligent Systems (CSOC 2017)

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 575))

Included in the following conference series:

Abstract

The mixed signals exhibit a characteristics called loops composed of multiple feedbacks and thus it is not feasible for apply traditional testing methods for conduction sophisticated formal verification with higher accuracy accompanied by speedy response. We surveyed the current research work in this regards to find that there are open-end issues pertaining to mixed signal formal verification. This paper has displayed a novel formal verification procedure of the mixed signal utilizing differentially-placed neural network. An analytical demonstrating is given (i) an algorithm for generating multiple mixed signal comparing to feasible operational states of mixed signal circuits, (ii) algorithm for formal verification and (iii) algorithm for training. The accomplished result of comparative analysis demonstrates 98.7% of accuracy with speed response as compared to the current learning algorithms.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Traub, J.F.J.: Formal Verification of Concurrent Embedded Software. BoD – Books on Demand (2016)

    Google Scholar 

  2. Zhan, N., Wang, S., Zhao, H.: Formal Verification of Simulink/Stateflow Diagrams: A Deductive Approach. Springer, Heidelberg (2016)

    Google Scholar 

  3. Huang, S.-Y., Cheng, K.-T.: Formal Equivalence Checking and Design Debugging. Springer Science & Business Media, New York (2012)

    MATH  Google Scholar 

  4. Li, L., Thornton, M.A.: Digital System Verification: A Combined Formal Methods and Simulation Framework. Morgan & Claypool Publishers, San Rafael (2010)

    Google Scholar 

  5. Scheffer, L., Lavagno, L., Martin, G.: EDA for IC System Design, Verification, and Testing. CRC Press, Boca Raton (2016)

    Google Scholar 

  6. Louerat, M.-M., Maehne, T.: Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL. Springer, Heidelberg (2014)

    Google Scholar 

  7. Cerny, E., Dudani, S., Havlicek, J., Korchemny, D.: The Power of Assertions in SystemVerilog. Springer, Heidelberg (2010)

    Book  Google Scholar 

  8. Verification with Model Checking. https://github.com/johnyf/tool_lists/blob/master/verification_synthesis.md. Accessed 12 Jan 2017

  9. VLSI Professional Network. http://vlsi.pro/formal-verification-an-overview/. Accessed 12 Jan 2017

  10. Bailey, B., Balarin, F., McNamara, M.: TLM-driven Design and Verification Methodology (2010). Lulu.com

  11. Bailey, B., Martin, G.: ESL Models and their Application: Electronic System Level Design and Verification in Practice. Springer, New York (2009)

    Google Scholar 

  12. Almeida, J.B., et al.: An overview of formal methods tools and techniques. In: Rigorous Software Development. Undergraduate Topics in Computer Science, pp. 15–44. Springer, London (2011)

    Google Scholar 

  13. Weib, B.: Deductive Verification of Object-oriented Software: Dynamic Frames, Dynamic Logic and Predicate Abstraction. KIT Scientific Publishing, Karlsruhe (2011)

    Google Scholar 

  14. Schumann, J.M.: Automated Theorem Proving in Software Engineering. Springer, Heidelberg (2013)

    Google Scholar 

  15. Saha, I., Roy, S., Ramesh, S.: Formal verification of fault-tolerant startup algorithms for time-triggered architectures: a survey. Proc. IEEE 104(5), 904–922 (2016)

    Article  Google Scholar 

  16. Alam, Q., et al.: Formal verification of the xDAuth protocol. IEEE Trans. Inf. Forensics Secur. 11(9), 1956–1969 (2016)

    Google Scholar 

  17. Calinescu, R., Ghezzi, C., Johnson, K., Pezze, M., Rafiq, Y., Tamburrelli, G.: Formal verification with confidence intervals to establish quality of service properties of software systems. IEEE Trans. Reliab. 65(1), 107–125 (2016)

    Article  Google Scholar 

  18. Campos, J.C., Sousa, M., Alves, M.C.B., Harrison, M.D.: Formal verification of a space system’s user interface with the IVY workbench. IEEE Trans. Human-Machine Syst. 46(2), 303–316 (2016)

    Article  Google Scholar 

  19. Cifuentes, F., Bustos Jimenez, J., Simmonds, J.: Formal verification of distributed system using an executable C model. IEEE Lat. Am. Trans. 14(6), 2874–2878 (2016)

    Article  Google Scholar 

  20. Webster, M., et al.: Toward reliable autonomous robotic assistants through formal verification: a case study. IEEE Trans. Human-Machine Syst. 46(2), 186–196 (2016)

    Article  Google Scholar 

  21. Vidhya, D.S., Manjunath, R.: Research trends in formal verification process for analog and mixed signal design. Int. J. Comput. Appl. 109(11), 10–15 (2015)

    Google Scholar 

  22. Ain, A., Bruto da Costa, A.A., Dasgupta, P.: Feature indented assertions for analog and mixed-signal validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(11), 1928–1941 (2016)

    Article  Google Scholar 

  23. Lim, B.C., Jang, J.E., Mao, J., Kim, J., Horowitz, M.: Digital analog design: enabling mixed-signal system validation. IEEE Des. Test 32(1), 44–52 (2015)

    Google Scholar 

  24. Yin, L., Deng, Y., Li, P.: Simulation-assisted formal verification of nonlinear mixed-signal circuits with Bayesian inference guidance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(7), 977–990 (2013)

    Article  Google Scholar 

  25. Little, S., Walter, D., Myers, C., Thacker, R., Batchu, S., Yoneda, T.: Verification of analog/mixed-signal circuits using labeled hybrid petri nets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(4), 617–630 (2011)

    Article  Google Scholar 

  26. Manjunath, R., Vasudev, S., Udupa, N.: Differential learning algorithm for artificial neural networks. Int. J. Comput. Appl. 1(1), 65–70 (2010)

    Google Scholar 

  27. Manjunath, R., Gurumurthy, K.S.: System design using differentially fed artificial neural networks. In: TENCON 2002 (2002)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to D. S. Vidhya .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2017 Springer International Publishing AG

About this paper

Cite this paper

Vidhya, D.S., Ramachandra, M. (2017). A Novel Design in Formal Verification Corresponding to Mixed Signals by Differential Learning. In: Silhavy, R., Silhavy, P., Prokopova, Z., Senkerik, R., Kominkova Oplatkova, Z. (eds) Software Engineering Trends and Techniques in Intelligent Systems. CSOC 2017. Advances in Intelligent Systems and Computing, vol 575. Springer, Cham. https://doi.org/10.1007/978-3-319-57141-6_40

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-57141-6_40

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-57140-9

  • Online ISBN: 978-3-319-57141-6

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics