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REVS: A Tool for Space-Optimized Reversible Circuit Synthesis

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Reversible Computation (RC 2017)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 10301))

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Abstract

Computing classical functions is at the core of many quantum algorithms. Conceptually any classical, irreversible function can be carried out by a Toffoli network in a reversible way. However, the Bennett method to obtain such a network in a “clean” form, i.e., a form that can be used in quantum algorithms, is highly space-inefficient. We present REVS, a tool that allows to trade time against space, leading to circuits that have a significantly smaller memory footprint when compared to the Bennett method. Our method is based on an analysis of the data dependency graph underlying a given classical program. We report the findings from running the tool against several benchmarks circuits to highlight the potential space-time tradeoffs that REVS can realize.

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References

  1. Revlib - an online resource for reversible functions and circuits. http://www.revlib.org/

  2. Aho, A.V., Lam, M.S., Sethi, R., Ullman, J.D.: Compilers: Principles, Techniques, and Tools. Addison Wesley, London (2007)

    MATH  Google Scholar 

  3. Bennett, C.H.: Logical reversibility of computation. IBM J. Res. Dev. 17, 525–532 (1973)

    Article  MathSciNet  MATH  Google Scholar 

  4. Bennett, C.H.: Time/space trade-offs for reversible computation. SIAM J. Comput. 18, 766–776 (1989)

    Article  MathSciNet  MATH  Google Scholar 

  5. Buhrman, H., Tromp, J., Vitányi, P.: Time and space bounds for reversible simulation. In: Orejas, F., Spirakis, P.G., Leeuwen, J. (eds.) ICALP 2001. LNCS, vol. 2076, pp. 1017–1027. Springer, Heidelberg (2001). doi:10.1007/3-540-48224-5_82

    Chapter  Google Scholar 

  6. Pebble games and complexity. Ph.D. thesis, Electrical Engineering and Computer Science, UC Berkeley, Technical report: EECS-2013-145 (2013)

    Google Scholar 

  7. Chattopadhyay, A., Pal, N., Majumder, S.: Ancilla-quantum cost trade-off during reversible logic synthesis using exclusive sum-of-products (2014). arxiv:1405.6073

  8. Goldschmidt, O., Hochbaum, D.S., Hurkens, C.A.J., Yu, G.: Approximation algorithms for the \(k\)-clique covering problem. SIAM J. Disc. Math. 9(3), 492–509 (1996)

    Article  MathSciNet  MATH  Google Scholar 

  9. Green, A., LeFanu Lumsdaine, P., Ross, N., Selinger, P., Valiron, B.: Quipper: a scalable quantum programming language. In: PLDI 2013 (2013)

    Google Scholar 

  10. Heckey, J., Patil, S., Javadi Abhari, A., Holmes, A., Kudrow, D., Brown, K.R., Franklin, D., Chong, F.T., Martonosi, M.: Compiler management of communication and parallelism for quantum computation. In: ASPLOS 2015, pp. 445–456. ACM (2015)

    Google Scholar 

  11. JavadiAbhari, A., Patil, S., Kudrow, D., Heckey, J., Lvov, A., Chong, F.T., Martonosi, M.: ScaffCC: scalable compilation and analysis of quantum programs. Parallel Comput. 45, 2–17 (2015)

    Article  Google Scholar 

  12. Lange, K.J., McKenzie, P., Tapp, A.: Reversible space equals deterministic space. J. Comput. Syst. Sci. 60(2), 354–367 (2000)

    Article  MathSciNet  MATH  Google Scholar 

  13. Lin, C.-C., Jha, N.K.: RMDDS: Reed-Muller decision diagram synthesis of reversible logic circuits. ACM J. Emerg. Technol. Comput. Syst. 10(2), 14 (2014)

    Article  Google Scholar 

  14. Maslov, D.: Reversible logic synthesis benchmarks page. http://webhome.cs.uvic.ca/~dmaslov/

  15. Maslov, D., Miller, D.M., Dueck, G.W.: Techniques for the synthesis of reversible Toffoli networks. ACM Trans. Des. Autom. Electron. Syst. 12(4), 42 (2007)

    Article  Google Scholar 

  16. Minkovich, K.: BLIF benchmark suite. http://cadlab.cs.ucla.edu/~kirill/

  17. Mishchenko, A., Brayton, R., Chatterjee, S.: Boolean factoring and decomposition of logic networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, pp. 38–44. IEEE Press (2008)

    Google Scholar 

  18. Mishchenko, A., Perkowski, M.: Fast heuristic minimization of exclusive sum-of-products, 2001. Exorcism is available as part of the ABC software. https://people.eecs.berkeley.edu/~alanmi/

  19. Muchnick, S.S.: Compiler Design and Implementation. Morgan Kaufmann, San Francisco (1997)

    Google Scholar 

  20. Nielsen, M.A., Chuang, I.L.: Quantum Computation and Quantum Information. Cambridge University Press, Cambridge (2000)

    MATH  Google Scholar 

  21. Parent, A., Parker, J., Burns, M., Maslov, D.: Quantum Circuit Viewer. Poster presentation at TQC 2013, University of Guelph, Canada. Software (2013). https://github.com/aparent/QCViewer, http://qcirc.iqc.uwaterloo.ca/

  22. Parent, A., Roetteler, M., Svore, K.M.: Reversible circuit compilation with space constraints (2015). arXiv:1510.00377

  23. Perumalla, K.S.: Introduction to Reversible Computing. CRC Press, Boca Raton (2014)

    Google Scholar 

  24. Saeedi, M., Markov, I.L.: Constant-optimized quantum circuits for modular multiplication and exponentiation. Quantum Information and Computation 12(5&6), 361–394 (2012)

    MathSciNet  MATH  Google Scholar 

  25. Saeedi, M., Markov, I.L.: Synthesis and optimization of reversible circuits - a survey. ACM Comput. Surv. 45(2), 21 (2013)

    Article  MATH  Google Scholar 

  26. Shafaei, A., Saeedi, M., Pedram, M.: Reversible logic synthesis of \(k\)-input, \(m\)-output lookup tables. In: DATE 2013, pp. 1235–1240 (2013)

    Google Scholar 

  27. Soeken, M., Robert Wille, R., Hilken, Ch., Przigoda, N., Drechsler, R.: Synthesis of reversible circuits with minimal lines for large functions. In: Proceedings of ASP-DAC 2012 (2012)

    Google Scholar 

  28. Syme, D., Granicz, A., Cisternino, A.: Expert F\(\#\) 3.0. Apress Publishing, New York (2012)

    Book  Google Scholar 

  29. Thomsen, M.K.: A functional language for describing reversible logic. In: Forum on Specification and Design Languages, pp. 135–142. IEEE (2012)

    Google Scholar 

  30. Viamontes, G.F., Markov, I.L., Hayes, J.P.: Quantum Circuit Simulation. Springer, Heidelberg (2009)

    Book  MATH  Google Scholar 

  31. Wille, R., Drechsler, R.: BDD-based synthesis of reversible logic for large functions. In: Proceedings of DAC 2009, pp. 270–275 (2009)

    Google Scholar 

  32. Wille, R., Drechsler, R.: Towards a Design Flow for Reversible Logic. Springer, Dodrecht (2010)

    Book  MATH  Google Scholar 

  33. Wille, R., Offermann, S., Drechsler, R.: SyReC: a programming language for synthesis of reversible circuits. In: Specification Design Languages (FDL), pp. 1–6 (2010)

    Google Scholar 

  34. Wille, R., Soeken, M., Drechsler, R.: Reducing the number of lines in reversible circuits. In: Proceedings of DAC 2010, pp. 647–652 (2010)

    Google Scholar 

  35. Wille, R., Soeken, M., Miller, D.M., Drechsler, R.: Trading off circuit lines and gate costs in the synthesis of reversible logic. Integration 47(2), 284–294 (2014)

    Google Scholar 

  36. Yokoyama, T., Glück, R.: A reversible programming language and its invertible self-interpreter. In: PEPM 2007, pp. 144–153 (2007)

    Google Scholar 

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Author information

Authors and Affiliations

  1. Institute for Quantum Computing, University of Waterloo, 200 University Avenue West, Waterloo, ON, Canada

    Alex Parent

  2. Quantum Architectures and Computation Group, Microsoft Research, One Microsoft Way, Redmond, WA, 98052, USA

    Alex Parent, Martin Roetteler & Krysta M. Svore

Authors
  1. Alex Parent
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  2. Martin Roetteler
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  3. Krysta M. Svore
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Corresponding author

Correspondence to Martin Roetteler .

Editor information

Editors and Affiliations

  1. Imperial College London, London, United Kingdom

    Iain Phillips

  2. Indian Institute of Engineering Science and Technology, Shibpur, India

    Hafizur Rahaman

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Parent, A., Roetteler, M., Svore, K.M. (2017). REVS: A Tool for Space-Optimized Reversible Circuit Synthesis. In: Phillips, I., Rahaman, H. (eds) Reversible Computation. RC 2017. Lecture Notes in Computer Science(), vol 10301. Springer, Cham. https://doi.org/10.1007/978-3-319-59936-6_7

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  • DOI: https://doi.org/10.1007/978-3-319-59936-6_7

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-59935-9

  • Online ISBN: 978-3-319-59936-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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