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Versat, a Minimal Coarse-Grain Reconfigurable Array

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High Performance Computing for Computational Science – VECPAR 2016 (VECPAR 2016)

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Abstract

This paper introduces Versat, a minimal Coarse-Grain Reconfigurable Array (CGRA) used as a hardware accelerator to optimize performance and power in a heterogeneous system. Compared to other works, Versat features a smaller number of functional units and a simpler controller, mainly used for reconfiguration and data transfer control. This stems from the observation that competitive acceleration can be achieved with a smaller array and more flexible reconfigurations. Partial reconfiguration plays a central role in Versat’s runtime reconfiguration scheme. Results on core area, frequency, power and performance are presented and compared to other implementations.

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Acknowledgment

This work was supported by national funds through Fundação para a Ciência e a Tecnologia (FCT) with reference UID/CEC/50021/2013.

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Authors and Affiliations

  1. INESC-ID/IST, University of Lisbon, Lisbon, Portugal

    João D. Lopes & José T. de Sousa

Authors
  1. João D. Lopes
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  2. José T. de Sousa
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Correspondence to José T. de Sousa .

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Editors and Affiliations

  1. University of Porto, Porto, Portugal

    Inês Dutra

  2. University of Porto, Porto, Portugal

    Rui Camacho

  3. University of Porto, Porto, Portugal

    Jorge Barbosa

  4. Lawrence Berkeley National Laboratory, Berkeley, California, USA

    Osni Marques

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Lopes, J.D., de Sousa, J.T. (2017). Versat, a Minimal Coarse-Grain Reconfigurable Array. In: Dutra, I., Camacho, R., Barbosa, J., Marques, O. (eds) High Performance Computing for Computational Science – VECPAR 2016. VECPAR 2016. Lecture Notes in Computer Science(), vol 10150. Springer, Cham. https://doi.org/10.1007/978-3-319-61982-8_17

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  • DOI: https://doi.org/10.1007/978-3-319-61982-8_17

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-61981-1

  • Online ISBN: 978-3-319-61982-8

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