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Implementation and Performance Comparison of a Four-Bit Ripple-Carry Adder Using Different MOS Current Mode Logic Topologies

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Computational Science and Its Applications – ICCSA 2017 (ICCSA 2017)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 10409))

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Abstract

In this paper, we have implemented a four-bit ripple carry adder using three different MOS Current Mode logic (MCML) topologies, namely conventional MCML, triple-tail cell based MCML, and quad-cell based MCML. The ripple-carry adder has been designed using four full adder circuits that essentially comprise of Sum and Carry circuit. The design of Sum and Carry circuits based on XOR gates and multiplexers has been proposed and implemented using the three specified topologies and a performance comparison is also presented. As the circuit has multiple inputs, quad cell based MCML implementation has shown the most promising performance in terms of power consumption and output voltage v/s temperature stability. However, the output voltage is most susceptible to noise in this topology. A deeper analysis of the circuits revealed that the number of transistors used is least in the conventional MCML based implementation while the triple tail based topology has the minimum delay.

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Authors and Affiliations

  1. Electrical Department, Delhi Technological University, Delhi, 110042, India

    Naman Saxena, Shruti Dutta, Neeta Pandey & Kirti Gupta

Authors
  1. Naman Saxena
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  2. Shruti Dutta
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  3. Neeta Pandey
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  4. Kirti Gupta
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Corresponding author

Correspondence to Naman Saxena .

Editor information

Editors and Affiliations

  1. University of Perugia, Perugia, Italy

    Osvaldo Gervasi

  2. University of Basilicata, Potenza, Italy

    Beniamino Murgante

  3. Covenant University, Ota, Nigeria

    Sanjay Misra

  4. University of Trieste, Trieste, Italy

    Giuseppe Borruso

  5. Polytechnic University of Bari, Bari, Italy

    Carmelo M. Torre

  6. University of Minho, Braga, Portugal

    Ana Maria A.C. Rocha

  7. Monash University, Clayton, Victoria, Australia

    David Taniar

  8. Kyushu Sangyo University, Fukuoka, Japan

    Bernady O. Apduhan

  9. Saint Petersburg State University, Saint Petersburg, Russia

    Elena Stankova

  10. University of Trieste, Trieste, Italy

    Alfredo Cuzzocrea

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Saxena, N., Dutta, S., Pandey, N., Gupta, K. (2017). Implementation and Performance Comparison of a Four-Bit Ripple-Carry Adder Using Different MOS Current Mode Logic Topologies. In: Gervasi, O., et al. Computational Science and Its Applications – ICCSA 2017. ICCSA 2017. Lecture Notes in Computer Science(), vol 10409. Springer, Cham. https://doi.org/10.1007/978-3-319-62407-5_21

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  • DOI: https://doi.org/10.1007/978-3-319-62407-5_21

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-62406-8

  • Online ISBN: 978-3-319-62407-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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