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Auto-Vectorization of Loops on Intel 64 and Intel Xeon Phi: Analysis and Evaluation

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Parallel Computing Technologies (PaCT 2017)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 10421))

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Abstract

This paper evaluates auto-vectorizing capabilities of modern optimizing compilers Intel C/C++, GCC C/C++, LLVM/Clang and PGI C/C++ on Intel 64 and Intel Xeon Phi architectures. We use the Extended Test Suite for Vectorizing Compilers consisting of 151 loops. In this work, we estimate speedup by running the loops in scalar and vector modes for different data types and determine loop classes which the compilers used in the study fail to vectorize. We use the dual CPU system (NUMA, 2 x Intel Xeon E5-2620v4, Intel Broadwell microarchitecture) with the Intel Xeon Phi 3120A co-processor for our experiments.

This work is supported by Russian Foundation for Basic Research (projects 15-07-00048, 16-07-00712).

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Correspondence to Olga V. Moldovanova .

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Moldovanova, O.V., Kurnosov, M.G. (2017). Auto-Vectorization of Loops on Intel 64 and Intel Xeon Phi: Analysis and Evaluation. In: Malyshkin, V. (eds) Parallel Computing Technologies. PaCT 2017. Lecture Notes in Computer Science(), vol 10421. Springer, Cham. https://doi.org/10.1007/978-3-319-62932-2_13

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  • DOI: https://doi.org/10.1007/978-3-319-62932-2_13

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-62931-5

  • Online ISBN: 978-3-319-62932-2

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