Abstract
In this chapter, we propose the concept of Fluid Pipelines, an evolution in the chip design process that allows for efficient late pipeline transformations. In a regular chip design process, pipeline depth and cycle time are fixed early in the design flow. However, their impact can only be assessed when the implementation is mostly done and any change in the pipeline design is impractical. Although Elastic Systems are latency insensitive and allow changes in the pipeline depth late in the design process with little design effort, they have significant throughput penalty when new stages are added in the presence of pipeline loops. Fluid Pipelines allow for pipeline transformations without a throughput penalty. Formally, we introduce “or-causality” in addition to the already existing “and-causality” in Elastic Systems. It gives more flexibility than previously possible at the cost of having the designer to specify the intended behavior of the circuit. In an Out-of-Order core benchmark, Fluid Pipelines improve the optimal energy-delay point by shifting both performance (by 17%) and energy (by 13%). We envision a scenario where tools would be able to generate different pipeline configurations from the same RTL, e.g., low power, high performance.
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Notes
- 1.
Cycles in the graph representing the connections between registers, not to be confused with program loops.
- 2.
In practice, a circuit implementing elasticity will most likely be deterministic depending on the input set, but this is not a formal requirement of the Elastic Systems specification.
- 3.
Other equivalent naming conventions have been used, e.g., Elasticity has been expressed in terms of FIFO operation [23].
- 4.
We note that inserting pipeline stages was proposed in synchronous circuits [12], but breaks the cycle accuracy of the circuit and should be used with care.
- 5.
- 6.
Only the benchmarks that do not require Fortran were used.
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Acknowledgements
This work was supported in part by the National Science Foundation under grants CNS-1059442-003, CNS-1318943-001, CCF-1337278, and CCF-1514284. Any opinions, findings, and conclusions or recommendations expressed herein are those of the authors and do not necessarily reflect the views of the NSF.
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Possignolo, R.T., Ebrahimi, E., Skinner, H., Renau, J. (2018). Automated Pipeline Transformations with Fluid Pipelines. In: Reis, A., Drechsler, R. (eds) Advanced Logic Synthesis. Springer, Cham. https://doi.org/10.1007/978-3-319-67295-3_6
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