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Spike-Timing-Dependent-Plasticity with Memristors

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Handbook of Memristor Networks

Abstract

Here we present a very exciting overlap between emergent nano technology and neuroscience, which has been discovered by neuromorphic engineers. Specifically, we are linking one type of memristor nano technology devices to the biological synaptic update rule known as Spike-Time-Dependent-Plasticity found in real biological synapses. Understanding this link allows neuromorphic engineers to develop circuit architectures that use this type of memristors to artificially emulate parts of the visual cortex. We focus on the type of memristors referred to as voltage or flux driven memristors and focus our discussions on behavioral macro models for such devices. The implementations result in fully asynchronous architectures with neurons sending their action potentials not only forwards but also backwards. One critical aspect is to use neurons that generate spikes of specific shapes. We will see how by changing the shapes of the neuron action potential spikes we can tune and manipulate the STDP learning rules for both excitatory and inhibitory synapses. We will see how neurons and memristors can be interconnected to achieve large scale spiking learning systems, that follow a type of multiplicative STDP learning rule. We will briefly extend the architectures to use three-terminal transistors with similar memristive behavior. We will illustrate how a V1 visual cortex layer can be assembled and how it is capable of learning to extract orientations from visual data coming from a real artificial CMOS spiking retina observing real life scenes. Finally, we will discuss limitations of currently available memristors. The results presented are based on behavioral simulations and do not take into account non-idealities of devices and interconnects. The aim here is to present, in a tutorial manner, an initial framework for the possible development of fully asynchronous STDP learning neuromorphic architectures exploiting two or three terminal memristive type devices.

A Supplemental Material compressed zip file containing all files used for the simulations can be downloaded from http://www.frontiersin.org/neuromorphic_engineering/10.3389/fnins.2011.00026/abstract.

This chapter is mostly a reprint from [1] with some extra material from [2].

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Notes

  1. 1.

    For a historical overview on how STDP research evolved independently among computational and experimentalist groups, please refer to the last paragraph in [14].

  2. 2.

    By ‘static’ we mean it is not altered by changes of the above electrical quantities, or by their history, integrals, derivatives, etc. These ‘static’ curves can, however, be time-varying if the change is caused by an external agent. For example, a motor driven potentiometer would have a ‘static’ i/v curve that is time varying.

  3. 3.

    Note that our aim in providing a macro model circuit is to have a means of simulating large number of memristors efficiently in a circuit simulator, and hence take advantage of its computational efficiency and ease of use. Our aim is not to provide a means of building physical circuits out of such macro models (as Chua did in the past using mutator circuits [9]). A direct physical circuit realization of Fig. 7b would result, for example, in leaks of the memory value w due to unavoidable current leak paths in parallel with the capacitor.

  4. 4.

    Compared to the arrangement in Fig. 19a, each of the 32 neurons in Fig. 21 represents one of the Feature Maps in Fig. 19a. Consequently, to implement the full V1 structure physically, each neuron with all its \(7\times 7\) input synapses in Fig. 21 has to be “cloned” in a \(128\times 128\) array.

  5. 5.

    This topology and these spike shapes also correspond to the theoretical simulations of case (2) and Fig. 22. The only difference between the two cases is in the number of neurons used: 32 neurons for the theoretical simulations, and 16 neurons for the circuit simulations.

References

  1. Zamarreño-Ramos, C., Camuñas-Mesa, L.A., Perez-Carrasco, J.A., Masquelier, T., Serrano-Gotarredona, T., Linares-Barranco, B.: On spike-timing-dependent-plasticity, memristive devices, and building a self-learning visual cortex. Front. Neuromorphic Eng. Front. Neurosci. 5, 26, 17 March 2011. Available from www.frontiersin.org/neuromorphic_engineering/10.3389/fnins.2011.00026/abstract

  2. Serrano-Gotarredona, T., Masquelier, T., Prodromakis, T., Indiveri, G., Linares-Barranco, B.: STDP and STDP variations with memristors for spiking neuromorphic learning systems. Front. Neuromorphic Eng. Front. Neurosci. 7, 02, 6 January 2013. Available from www.frontiersin.org/Neuroscience/10.3389/fnins.2013.00002/abstract

  3. http://en.wikipedia.org/wiki/Neuromorphic

  4. Mead, C.: Analog VLSI and Neural Systems. Addison Wesley, Reading (1989)

    Google Scholar 

  5. Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: The missing memristor found. Nature 453(1), 80–83 (2008)

    Article  Google Scholar 

  6. Borghetti, J., Li, Z., Straznicky, J., Li, X., Ohlberg, D.A.A., Wu, W., Stewart, D.R., Williams, R.S.: A hybrid nanomemristor/transistor logic circuit capable of self-programming. PNAS 106(6), 1699–1703 (2009)

    Article  Google Scholar 

  7. Jo, S.H., Chang, T., Ebong, I., Bhadviya, B.B., Mazumder, P., Lu, W.: Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10(4), 1297–1301 (2010)

    Article  Google Scholar 

  8. Jo, S.H., Kim, K.-H., Lu, W.: High-density crossbar arrays based on a Si memristive system. NANO Lett. 9(2), 870–874 (2009)

    Article  Google Scholar 

  9. Chua, L.O.: Memristor - the missing circuit element. IEEE Trans. Circ. Theor. 18, 507–519 (1971)

    Article  Google Scholar 

  10. Chua, L.O., Kang, S.M.: Memristive devices and systems. Proc. IEEE 64(2), 209–223 (1976)

    Article  MathSciNet  Google Scholar 

  11. Chua, L.O., Desoer, C.A., Kuh, E.S.: Linear and Nonlinear Circuits. McGraw-Hill, New York (1987)

    MATH  Google Scholar 

  12. Gerstner, W., Ritz, R., Hemmen, J.L.: Why spikes? Hebbian learning and retrieval of time-resolved excitation patterns. Biol. Cybern. 69, 503–515 (1993)

    Article  MATH  Google Scholar 

  13. Gerstner, W., Kempter, R., Leo van Hemmen, J., Wagner, H.: A neuronal learning rule for sub-millisecond temporal coding. Lett. Nat. 383, 76–78 (1996)

    Article  Google Scholar 

  14. Sjrstrm, J., Gerstner, W.: Spike-timing dependent plasticity. In: Scholarpedia, the Peer-Reviewed Open-Access Encyclopedia, vol. 5(2), p. 1362 (2010). (Available from http://www.scholarpedia.org/article/STDP)

  15. Rao, R.P.N., Sejnowski, T.J.: Spike-time-dependent Hebbian plasticity as temporal difference learning. Neural Comp. 13, 2221–2237 (2001)

    Article  MATH  Google Scholar 

  16. Porr, B., Wrgtter, F.: How the shape of pre- and postsynaptic signals can influence STDP: a biophysical model. Neural Comp. 16, 595–625 (2004)

    Article  MATH  Google Scholar 

  17. Delorme, A., Perrinet, L., Thorpe, S.J.: Networks of integrate-and-fire neurons using rank order coding B: spike timing dependent plasticity and emergence of orientation selectivity. Neurocomputing 38–40, 539–545 (2001)

    Article  Google Scholar 

  18. Guyonneau, R., VanRullen, R., Thorpe, S.J.: Temporal codes and sparse representations: a key to understanding rapid processing in the visual system. J. Physiol. Paris 98(4–6), 487–497 (2004)

    Article  Google Scholar 

  19. Masquelier, T., Thorpe, S.J.: Unsupervised learning of visual features through spike timing dependent plasticity. PLoS Comput. Biol. 3(2), e31 (2007)

    Article  Google Scholar 

  20. Weidenbacher, U., Neumann, H.: Unsupervised learning of head pose through spike-timing dependent plasticity. Perception in Multimodal Dialogue Systems. Lecture Notes in Computer Science, vol. 5078, pp. 123–131. Springer, Berlin/Heidelberg (2008)

    Google Scholar 

  21. Masquelier, T., Thorpe, S.J.: Learning to recognize objects using waves of spikes and spike timing-dependent plasticity. In: Proceedings of the 2010 IEEE International Joint Conference on Neural Networks (2010). (https://doi.org/10.1109/IJCNN.2010.5596934)

  22. Masquelier, T., Guyonneau, R., Thorpe, S.J.: Spike timing dependent plasticity finds the start of repeating patterns in continuous spike trains. PLoS ONE 3(1), e1377 (2008)

    Article  Google Scholar 

  23. Masquelier, T., Guyonneau, R., Thorpe, S.J.: Competitive STDP-based spike pattern learning. Neural Comp. 21(5), 1259–1276 (2009). (https://doi.org/10.1162/neco.2008.06-08-804)

    Article  MATH  Google Scholar 

  24. Masquelier, T., Hugues, E., Deco, G., Thorpe, S.J.: Oscillations, phase-of-firing coding and spike timing-dependent plasticity: an efficient learning scheme. J. Neurosci. 29(43), 13484–13493 (2009)

    Article  Google Scholar 

  25. Young, J.M.: Cortical reorganization consistent with spike timing-but not correlation-dependent plasticity. Nat. Neurosc. 10(7), 887–895 (2007)

    Article  Google Scholar 

  26. Finelli, L.A., Haney, S., Bazhenov, M., Stopfer, M., Sejnowski, T.J.: Synaptic learning rules and sparse coding in a model sensory system. PLoS Comput. Biol. 4(4), e1000062 (2008)

    Article  MathSciNet  Google Scholar 

  27. Hebb, D.O.: The Organization of Behavior. A Neuropsychological Study. Wiley, New York (1949)

    Google Scholar 

  28. Snider, G.S.: Self-organized computation with unreliable, memristive nanodevices. Nanotechnology 18, 365202 (2007)

    Article  Google Scholar 

  29. Snider, G.S.: Spike-timing-dependent learning in memristive nanodevices. In: IEEE International Symposium Nano Architectures, pp. 85–92 (2008)

    Google Scholar 

  30. Linares-Barranco, B., Serrano-Gotarredona, T.: Memristance Can Explain Spike-Time-Dependent-Plasticity in Neural Synapses. Available from Nature Precedings. http://hdl.handle.net/10101/npre.2009.3010.1 (2009)

  31. Markram, H., Lbke, J., Frotscher, M., Sakmann, B.: Regulation of synaptic efficacy by coincidence of postsynaptic APS and EPSPS. Science 275(5297), 213–215 (1997)

    Article  Google Scholar 

  32. Bi, G., Poo, M.: Synaptic modifications in cultured hippocampal neurons: dependence on spike timing, synaptic strength, and postsynaptic cell type. J. Neurosci. 18(24), 10464–10472 (1998)

    Article  Google Scholar 

  33. Bi, G., Poo, M.M.: Synaptic modification by correlated activity: Hebb’s postulate revisited. Ann. Rev. Neurosci. 24, 139–166 (2001)

    Article  Google Scholar 

  34. Zhang, L., Tao, H., Holt, C., Harris, W., Poo, M.: A critical window for cooperation and competition among developing retinotectal synapses. Nature 395(6697), 37–44 (1998)

    Article  Google Scholar 

  35. Feldman, D.: Timing-based LTP and LTD at vertical inputs to layer II/III pyramidal cells in rat barrel cortex. Neuron 27(1), 45–56 (2000)

    Article  Google Scholar 

  36. Mu, Y., Poo, M.M.: Spike timing-dependent LTP/LTD mediates visual experience-dependent plasticity in a developing retinotectal system. Neuron 50(1), 115–125 (2006)

    Article  Google Scholar 

  37. Cassenaer, S., Laurent, G.: Hebbian STDP in mushroom bodies facilitates the synchronous flow of olfactory information in locusts. Nature 448(7154), 709–713

    Article  Google Scholar 

  38. Jacob, V., et al.: Spike-timing-dependent synaptic depression in the in vivo barrel cortex of the rat. J. Neurosc. 27(6), 1271–1284 (2007)

    Article  Google Scholar 

  39. Rubin, J.E., Gerkin, R.C., Bi, G.-Q., Chow, C.C.: Calcium time course as a signal for spike-timing-dependent plasticity. J. Neuroph. 93, 2600–2613 (2005)

    Article  Google Scholar 

  40. Abbott, L.F., Nelson, S.B.: Synaptic plasticity: taming the beast. Nat. Neurosci. 3, 1178–1183 (2000)

    Article  Google Scholar 

  41. Van Rossum, M.C.W., Bi, G.Q., Turrigiano, G.G.: Stable Hebbian Learning from Spike Timing-Dependent Plasticity. J. Neurosci. 20(23), 8812–8821 (2000)

    Article  Google Scholar 

  42. Nessler, B., Pfeiffer, M., Maass, W.: STDP enables spiking neurons to detect hidden causes of their inputs. In: Bengio, Y., Schuurmans, D., Lafferty, J., Williams, C.K.I., Culotta, A. (eds.) Advances in Neural Information Processing Systems, vol. 22, pp. 1357–1365. MIT Press, Cambridge (2010)

    Google Scholar 

  43. Querlioz, D., Bichler, O., Gamrat, C.: Simulation of a memristor-based spiking neural network immune to device variations. In: Proceedings of International Joint Conference Neural Networks (IJCNN), 1775–1781 (2011)

    Google Scholar 

  44. Bichler, O., Suri, M., Querlioz, D., Vuillaume, D., DeSalvo, B., Gamrat, C.: Visual pattern extraction using energy-efficient "2-PCM synapse" neuromorphic architecture. IEEE Trans. Electron Devices 59(8), 2206–2214 (2012)

    Article  Google Scholar 

  45. Bichler, O., Querlioz, D., Thorpe, S.J., Bourgoin, J.P., Gamrat, C.: Extraction of temporally correlated features from dynamic vision sensors with spike-timing-dependent plasticity. Neural Netw. 32, 339–348 (2012)

    Article  Google Scholar 

  46. Lubenov, E.V., Siapas, A.G.: Decoupling through synchrony in neuronal circuits with propagation delays. Neuron 58, 118–131 (2008)

    Article  Google Scholar 

  47. Rubin, J., Lee, D.D., Sompolinsky, H.: Equilibrium properties of temporally asymmetric Hebbian plasticity. Phys. Rev. Lett. 86(2), 364–367 (2001)

    Article  Google Scholar 

  48. Gtig, R., Aharonov, R., Rotter, S., Sompolinsky, H.: Learning input correlations through nonlinear temporally asymmetric Hebbian plasticity. J. Neurosci. 23(9), 3697–3714 (2003)

    Article  Google Scholar 

  49. Argall, F.: Switching Phenomena in Titanium Oxide Thin Films. Solid-State Electronics, vol. 11, pp. 535–541. Pergamon Press (1968)

    Google Scholar 

  50. Swaroop, B., West, W.C., Martinez, G., Kozicki, M.N., Akers, L.A.: Programmable Current Mode Hebbian Learning Neural Network using programmable metallization cell. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS1998), pp. III.33–36 (1998)

    Google Scholar 

  51. Nian, Y., Strozier, J., Wu, N., Chen, X., Ignatiev, A.: Evidence for an oxygen diffusion model for the electric pulse induced resistance change effect in transition-metal oxides. Phys. Rev. Lett. 98(14), 146–403 (2007)

    Article  Google Scholar 

  52. Yang, J.J., Pickett, M.D., Li, X., Ohlberg, D.A.A., Stewart, D.R., Williams, R.S.: Memristive switching mechanism for metal/oxide/metal nanodevices. Nat. Nanotech. 3(7), 429–433 (2008)

    Article  Google Scholar 

  53. Hur, J., Lee, M.-J., Lee, C., Kim, Y.-B., Kim, C. J.: Modeling for bipolar resistive memory switching in transition-metal oxides. Phys. Rev. B 82(15) (2010)

    Google Scholar 

  54. Wuttig, M., Yamada, N.: Phase-change materials for rewriteable data storage. Nat. Mater. 6(11), 824–832 (2007)

    Article  Google Scholar 

  55. Joglekar, Y.N., Wolf, S.J.: The elusive memristor: properties of basic electrical circuits. Eur. J. Phys. 30, 661–675 (2009)

    Article  MATH  Google Scholar 

  56. Biolek, Z., Biolek, D., Biolkova, V.: Spice model for memristor with nonlinear Dopant drift. Radioengineering 18(2), 210–214 (2009)

    Google Scholar 

  57. Kwon, D.H., et al.: Atomic structure of conducting nanofilaments in \(TiO_2\) resistive switching memory. Nat. Nanotech. 5, 148–153 (2010)

    Article  Google Scholar 

  58. Yang, Y., Gao, P., Gaba, S., Chang, T., Pan, X., Lu, W.: Observation of conducting filament growth in nanoscale resistive memories. Nat. Commun. 3, 732 (2012). https://doi.org/10.1038/ncomms1737

    Article  Google Scholar 

  59. Shihong, M.W., Prodromakis, T., Salaoru, I., Toumazou, C.: Modelling of Current Percolation Channels in Emerging Resistive Switching Elements. arXiv:1206.2746v1 [cond-mat.mes-hall]

  60. Chanthbouala, A., Garcia, V., Cherifi, R.O., Bouzehouane, K., Fusil, S., Moya, X., Xavier, S., Yamada, H., Deranlot, C., Mathur, N.D., Bibes, M., Bartlmy, A., Grollier, J.: A ferroelectric memristor. Nat. Mater. 11, 860–864 (2012)

    Article  Google Scholar 

  61. Indiveri, G., et al.: Neuromorphic Silicon Neuron Circuits. Inaugural issue of Front. Neuromorphic Eng. http://www.frontiersin.org/neuromorphic_engineering

  62. Maass, W.: Private communication

    Google Scholar 

  63. Sivilotti, M.: Wiring considerations in analog VLSI systems with application to field-programmable networks. Ph.D. Computation and Neural Systems, Caltech, Pasadena California (1991)

    Google Scholar 

  64. Mahowald, M.A.: VLSI analogs of neuronal visual processing: a synthesis of form and function. Ph.D, Computation and Neural Systems, Caltech, Pasadena, California (1992)

    Google Scholar 

  65. Lazzaro, J., Wawrzynek, J., Mahowald, M., Silvilotti, M., Gillespie, D.: Silicon auditory processors as computer peripherals. IEEE Trans. Neural Netw. 4, 523–528 (1993)

    Article  Google Scholar 

  66. Cauwenberghs, G., Kumar, N., Himmelbauer, W., Andreou, A.G.: An analog VLSI chip with asynchronous interface for auditory feature extraction. IEEE Trans. Circ. Syst. Part-II 45, 600–606 (1998)

    Article  Google Scholar 

  67. Boahen, K.: Retinomorphic chips that see quadruple images. In: Proceedings of International Conference Microelectronics for Neural, Fuzzy and Bio-Inspired Systems (Microneuro99), pp. 12–20, Granada, Spain (1999)

    Google Scholar 

  68. Boahen, K.: A retinomorphic chip with parallel pathways: encoding INCREASING, ON, DECREASING, and OFF visual signals. Int. J. Analog Integr. Circ. Sig. Process. 30, 121–135 (2002)

    Google Scholar 

  69. Martin, A.J., Nystrm, M.: Asynchronous techniques for system-on-chip design. Proc. IEEE 94(6), 1089–1120 (2006)

    Article  Google Scholar 

  70. Spars, J., Furber, S.B.: Principles of Asynchronous Circuit Design: A Systems Perspective. Kluwer Academic Publishers (2001)

    Google Scholar 

  71. Mortara, A., Vittoz, E.A., Venier, P.: A Communication Scheme for Analog VLSI Perceptive Systems. IEEE Journal of Solid-State Circuits 30(6), 660–669 (1995)

    Article  Google Scholar 

  72. Boahen, K.: Retinomorphic Vision Systems. In: Microneuro’96: Fifth International Conference on Neural Networks and Fuzzy Systems, Laousanne, Switzerland (1996)

    Google Scholar 

  73. Boahen, K.: Point-to-point connectivity between neuromorphic chips using address events. IEEE Trans. Circ. Syst. Part-II 47(5), 416–434 (2000)

    Article  MATH  Google Scholar 

  74. Posch, C., et al.: A QVGA 143dB Dynamic Range Asynchronous Address-Event PWM Dynamic Image Sensor with Lossless Pixel-Level Video Compression. ISSCC Dig. of Tech. Papers 2010, 400–401 (2010)

    Google Scholar 

  75. Culurciello, E., Etienne-Cummings, R., Boahen, K.A.: A biomorphic digital image sensor. IEEE J. Solid-State Circ. 38, 281–294 (2003)

    Article  Google Scholar 

  76. Ruedi, P.F., et al.: A \(128\times 128\), pixel 120-dB dynamic-range vision-sensor chip for image contrast and orientation extraction. IEEE J. Solid-State Circ. 38, 2325–2333 (2003)

    Article  Google Scholar 

  77. Chen, S., Bermak, A.: Arbitrated time-to-first spike CMOS image sensor with on-chip histogram equalization. IEEE Trans. VLSI Syst. 15(3), 346–357 (2007)

    Article  Google Scholar 

  78. Azadmehr, M., Abrahamsen, J., Hafliger, P.: A foveated AER imager chip. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS2005), pp. 2751–2754, Kobe, Japan (2005)

    Google Scholar 

  79. Massari, N., et al.: A 100uW 64x128-pixel contrast-based asynchronous binary vision sensor for wireless sensor networks. In: IEEE ISSCC Dig. of Technical Papers, pp. 588–638 (2008)

    Google Scholar 

  80. Ruedi, P.F., et al.: An SoC combining a 132dB QVGA pixel array and a 32b DSP/MCU processor for vision applications. In: IEEE ISSCC Dig. of Technical Papers, pp. 46–47, 47a (2009)

    Google Scholar 

  81. Costas-Santos, J., et al.: A contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems. IEEE Trans Circ. Syst. I: Reg. Papers 54(7), 1444–1458 (2007)

    Google Scholar 

  82. Leñero-Bardallo, J.A., Serrano-Gotarredona, T., Linares-Barranco, B.: A five-decade dynamic-range ambient-light-independent calibrated signed-spatial-contrast AER retina With 0.1 ms latency and optional time-to-first-spike mode. IEEE Trans. Circ. Syst. (Part I) 57(10), 2632–2643 (2010)

    Article  MathSciNet  Google Scholar 

  83. Mallik, U., et al.: Temporal change threshold detection imager. In: IEEE ISSCC Dig. of Technical Papers, 362–363 (2005)

    Google Scholar 

  84. Posch, C., et al.: A dual-line optical transient sensor with on-chip precision time-stamp generation. In IEEE ISSCC Dig. of Technical Papers, pp. 500–618 (2007)

    Google Scholar 

  85. Lichtsteiner, P., Posch, C., Delbruck, T.: A \(128\times 128\) 120 dB 30 mW Asynchronous vision sensor that responds to relative intensity change. IEEE J. Solid-State Circ. 43(2), 566–576 (2008)

    Article  Google Scholar 

  86. Leñero-Bardallo, J.A., Serrano-Gotarredona, T., Linares-Barranco, B.: A 3.6\(\mu s\) latency frame-free event-driven dynamic vision sensor. IEEE J. Solid-State Circ. (2010)

    Google Scholar 

  87. Zaghloul, K.A., Boahen, K.: Optic nerve signals in a neuromorphic chip: Part 1. IEEE Trans. Biomed Eng. 51, 657–666 (2004)

    Article  Google Scholar 

  88. Zaghloul, K.A., Boahen, K.: Optic nerve signals in a neuromorphic chip: Part 2. IEEE Trans. Biomed. Eng. 51, 667–675 (2004)

    Article  Google Scholar 

  89. Sarpeshkar, R., et al.: An analog bionic ear processor with zero-crossing detection. In: ISSCC Dig. of Technical. Papers, pp. 78–79 (2005)

    Google Scholar 

  90. Wen, B., Boahen, K.: A 360-channel speech preprocessor that emulates the cochlear amplifier. In ISSCC Dig. of Tech. Papers, pp. 556–557 (2006)

    Google Scholar 

  91. Chan, V., Liu, S.-C., van Schaik, A.: AER EAR: a matched silicon cochlea pair with address event representation interface. IEEE Trans. Circ. Syst. Part-I 54, 48–59 (2007)

    Article  Google Scholar 

  92. Chicca, E., Whatley, A.M., Lichtsteiner, P., Dante, V., Delbruck, T., Del Giudice, P., Douglas, R.J., Indiveri, G.: A multichip pulse-based neuromorphic infrastructure and its application to a model of orientation selectivity. IEEE Trans. Circ. Syst. Part I 54(5), 981–993 (2007)

    Article  Google Scholar 

  93. Oster, M., Wang, Y., Douglas, R., Liu, S.-C.: Quantification of a spike-based winner-take-all VLSI network. IEEE Trans. Circ. Syst. Part-1 55(10), 3160–3169 (2008)

    Article  MathSciNet  Google Scholar 

  94. Teixeira, T., Andreou, A.G., Culurciello, E.: Event-based imaging with active illumination in sensor networks. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS2005), pp. 644–647, Kobe, Japan (2005)

    Google Scholar 

  95. Vernier, P., Mortara, A., Arreguit, X., Vittoz, E.A.: An integrated cortical layer for orientation enhancement. IEEE J. Solid-State Circ. 32(2), 177–186 (1997)

    Article  Google Scholar 

  96. Choi, T.Y.W., Merolla, P., Arthur, J., Boahen, K., Shi, B.E.: Neuromorphic implementation of orientation hypercolumns. IEEE Trans. Circ. Syst. (Part I) 52(6), 1049–1060 (2005)

    Article  MathSciNet  MATH  Google Scholar 

  97. Serrano-Gotarredona, T., Andreou, A.G., Linares-Barranco, B.: AER image filtering architecture for vision processing systems. IEEE Trans. Circ. Syst. (Part I) 46(9), 1064–1071 (1999)

    Article  Google Scholar 

  98. Serrano-Gotarredona, R., et al.: A neuromorphic cortical-layer microchip for spike-based event processing vision systems. IEEE Trans. Circ. Syst. (Part-I) 53(12), 2548–2566 (2006)

    Article  Google Scholar 

  99. Serrano-Gotarredona, R., et al.: On real-time AER 2D convolutions hardware for neuromorphic spike based cortical processing. IEEE Trans. Neural Netw. 19(7), 1196–1219 (2008)

    Article  Google Scholar 

  100. Camuñas-Mesa, L., Acosta-Jimenez, A., Zamarreño-Ramos, C., Serrano-Gotarredona, T., Linares-Barranco, B.: A \(32\times 32\) convolution processor chip for address event vision sensors with 155ns event latency and 20Meps throughput. IEEE IEEE Trans. Circ. Syst. (Part-I) 58(4), 777–790 (2011). https://doi.org/10.1109/TCSI.2010.2078851

    Article  MathSciNet  Google Scholar 

  101. Berge, H.K.O., Hafliger, P.: High-speed serial AER on FPGA. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS2007), pp. 857–860 (2005)

    Google Scholar 

  102. Serrano-Gotarredona, R., et al.: CAVIAR: A 45k Neuron, 5M synapse, 12G Connects/s AER hardware sensory-processing-learning-actuating system for high-speed visual object recognition and tracking. IEEE Trans. Neural Netw. 20(9), 1417–1438 (2009)

    Article  Google Scholar 

  103. Perez-Carrasco, J.A., Acha, B., Serrano, C., Camuñas-Mesa, L., Serrano-Gotarredona, T., Linares-Barranco, B.: Fast vision through frame-less event-based sensing and convolutional processing. Application to texture recognition. IEEE Trans. Neural Netw. 21(4), 609–620 (2010)

    Article  Google Scholar 

  104. Camuñas-Mesa, L., Perez-Carrasco, J.A., Zamarreño-Ramos, C., Serrano-Gotarredona, T., Linares-Barranco, B.: On scalable spiking ConvNet hardware for cortex-like visual sensory processing systems. IEEE International Symposium Circuits Systems ISCAS 2010, 249–252 (2010)

    Google Scholar 

  105. Zamarreño-Ramos, C., Linares-Barranco, A., Serrano-Gotarredona, T., Linares-Barranco, B.: Multi-casting mesh AER: a scalable assembly approach for reconfigurable neuromorphic structured AER systems. Application to ConvNets. IEEE Trans. Biomed. Circ. Syst. 7(1), 82–102 (2013)

    Article  Google Scholar 

  106. Hubel, D.H., Wiesel, T.N.: Receptive fields of single neurones in the cat’s striate cortex. J. Physiol. 148, 574–591 (1959)

    Article  Google Scholar 

  107. Strukov, D.B., Likharev, K.K.: CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology 16, 888–900 (2005)

    Article  Google Scholar 

  108. Delbruck, T.: Driving in pasadena to the post office from Vision Project jAER download area. Available at http://sourceforge.net/apps/trac/jaer/wiki/AER%20data

  109. Goodman, D., Brette, R.: Brian: a simulator for spiking neural networks in python. Front. Neuroinform. 2, 5 (2008). (https://doi.org/10.3389/neuro.11.005.2008)

  110. Gerstner, W.: Spiking neurons Ch. 1. In: Maass, W., Bishop, C.M. (eds.) Pulsed Neural Networks. MIT Press, Cambridge (1999)

    Google Scholar 

  111. Green, J.E., Choi, J.W., Boukai, A., Bunimovich, Y., Johnston-Halperin, E., DeIonno, E., Luo, Y., Sheriff, B.A., Xu, K., Shin, Y.S., Tseng, H.-R., Stoddart, J.F., Heath, J.R.: A 160-kilobit molecular electronic memory patterned at \(10^{11}\) bits per square centimetre”. Nature 445, 414–417 (2007)

    Article  Google Scholar 

  112. Jung, G.-Y., Johnston-Halperin, E., Wu, W., Yu, Z., Wang, S.-Y., Tong, W.M., Li, Z., Green, J.E., Sheriff, B.A., Boukai, A., Bunimovich, Y., Heath, J.R., Williams, R.S.: Circuit fabrication at 17 nm half-pitch by nanoimprint lithography. Nano Lett., 351–354 (2006)

    Article  Google Scholar 

  113. Jeon, H.-J., Kim, K.H., Baek, Y.-K., Kim, D.W., Jung, H.-T.: New top-down approach for fabricating high-aspect-ratio complex nanostructures with 10nm scale features. Nano Lett. 10(9), 3604–3610 (2010)

    Article  Google Scholar 

  114. Izhikevich, E.M., Desai, N.S.: Relating STDP to BCM. Neural Comput. 15, 1511–1523 (2003)

    Article  MATH  Google Scholar 

  115. Watt, A.J., Desai, N.S.: Homeostatic plasticity and STDP: keeping a neuron’s cool in a fluctuating world. Front. Syn. Neurosci. 2, 5. https://doi.org/10.3389/fnsyn.2010.00005

  116. Pershin, Y.V., Di Ventra, M.: Experimental demonstration of associative memory with memristive neural networks. Neural Netw. 23(7), 881–886 (2010). https://doi.org/10.1016/j.neunet.2010.05.001

    Article  Google Scholar 

  117. Pershin, Y.V., Di Ventra, M.: Practical approach to programmable analog circuits with memristors. IEEE Trans. Circ. Syst. Part-I 57(8), 1857–1864 (2010)

    MathSciNet  Google Scholar 

  118. Perez-Carrasco, J.A., Zamarreño-Ramos, C., Serrano-Gotarredona, T., Linares-Barranco, B.: On neuromorphic spiking architectures for asynchronous STDP memristive systems. In: Proceedings of the IEEE International Symposium on Circuit and System (ISCAS2010), pp. 1659–1662, Paris (2010)

    Google Scholar 

  119. Shin, S., Kim, K., Kang, S.-M.: Compact models for memristors based on charge-flux constitutive relationships. IEEE Trans. CAD of Int. Circ. Syst. 29(4), 590–598 (2010)

    Article  Google Scholar 

  120. Agnus, G., et al.: Carbon nanotube-based programmable devices for adaptive architectures. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS2010), pp. 1667–1670, Paris (2010)

    Google Scholar 

  121. Bichler, O., et al.: Development of a functional model for the nanoparticle-organic memory transistor. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS2010), pp. 1663–1666, Paris (2010)

    Google Scholar 

  122. Jeong, H.Y., et al.: Graphene oxide thin films for flexible nonvolatile memory applications. Nano Lett. (2010). https://doi.org/10.1021/nl101902k

    Article  Google Scholar 

  123. Lai, Q., et al.: An organic/Si nanowire hybrid field configurable transistor. Nano Lett. 8(3), 876–880 (2008)

    Article  Google Scholar 

  124. Ramakrishnan, S., Hasler, P., Gordon, C.: Floating gate synapses with spike time dependent plasticity. In: Proceedings of the IEEE International Symposium on Circuits and System (ISCAS2010), pp. 369–372, Paris (2010)

    Google Scholar 

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Authors and Affiliations

  1. Instituto de Microelectronica de Sevilla, Seville, Spain

    Teresa Serrano-Gotarredona, Timothée Masquelier & Bernabe Linares-Barranco

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  1. Teresa Serrano-Gotarredona
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  2. Timothée Masquelier
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  3. Bernabe Linares-Barranco
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Correspondence to Teresa Serrano-Gotarredona .

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  1. Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA, USA

    Leon Chua

  2. Democritus University of Thrace, Xanthi, Greece

    Georgios Ch. Sirakoulis

  3. Department of Computer Science and Creative Technologies, University of the West of England, Bristol, UK

    Andrew Adamatzky

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Serrano-Gotarredona, T., Masquelier, T., Linares-Barranco, B. (2019). Spike-Timing-Dependent-Plasticity with Memristors. In: Chua, L., Sirakoulis, G., Adamatzky, A. (eds) Handbook of Memristor Networks. Springer, Cham. https://doi.org/10.1007/978-3-319-76375-0_15

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