Abstract
PCI Express plays a vital role in including FPGA accelerators into high-performance computing systems. This also includes direct communication between multiple FPGAs, without any involvement of the main memory of the host. We present a highly configurable hardware interface that supports DMA-based connections to a host system as well as direct communication between multiple FPGAs. Our implementation offers unidirectional channels to connect FPGAs, allowing for precise adaptation to all kinds of use cases. Multiple channels to the same endpoint can be used to realise independent data transmissions. While the main focus of this work is flexibility, we are able to show maximum throughput for connections between two FPGAs and up to 88% saturation of the available bandwidth for connections between the FPGA and the host system.
O. Sezenlik and S. Schüller—These authors contributed equally to this work.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Billauer, E.: Xillybus. http://xillybus.com
Northwest Logic: PCI Express Solution (2017). http://nwlogic.com/products/pci-express-solution/
Jacobsen, M., Richmond, D., Hogains, M., Kastner, R.: RIFFA 2.1: A reusable integration framework for FPGA accelerators. ACM Trans. Reconfigurable Technol. Syst. 8(4), 22:1–22:23 (2015). https://doi.org/10.1145/2815631
Vesper, M., Koch, D., Vipin, K., Fahmy, S.A.: JetStream: an open-source high-performance PCI express 3 streaming library for FPGA-to-host and FPGA-to-FPGA communication. In: 2016 26th International Conference on Field Programmable Logic and Applications (FPL), pp. 1–9 (2016). https://doi.org/10.1109/FPL.2016.7577334
de la Chevallerie, D., Korinth, J., Koch, A.: ffLink: a lightweight high-performance open-source PCI express Gen3 interface for reconfigurable accelerators. SIGARCH Comput. Archit. News 43(4), 34–39 (2016). https://doi.org/10.1145/2927964.2927971
Gong, J., Wang, T., Chen, J., Wu, H., Ye, F., Lu, S., Cong, J.: An efficient and flexible host-FPGA PCIe communication library. In: 2014 24th International Conference on Field Programmable Logic and Applications (FPL), pp. 1–6 (2014). https://doi.org/10.1109/FPL.2014.6927459
Vipin, K., Fahmy, S.A.: DyRACT: a partial reconfiguration enabled accelerator and test platform. In: 2014 24th International Conference on Field Programmable Logic and Applications (FPL), pp. 1–7 (2014). https://doi.org/10.1109/FPL.2014.6927507
ARM Ltd.: AMBA AXI4-Stream Protocol Specification v1.0 (2010). http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0051a/index.html
Xilinx Inc.: 7 Series FPGAs Integrated Block for PCI Express v2.2 Product Guide for Vivado Design Suite (2016)
PCI-SIG: PCI Express Base Specification Revision 2.1 (2009)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2018 Springer International Publishing AG, part of Springer Nature
About this paper
Cite this paper
Sezenlik, O., Schüller, S., Anlauf, J.K. (2018). VerCoLib: Fast and Versatile Communication for FPGAs via PCI Express. In: Voros, N., Huebner, M., Keramidas, G., Goehringer, D., Antonopoulos, C., Diniz, P. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2018. Lecture Notes in Computer Science(), vol 10824. Springer, Cham. https://doi.org/10.1007/978-3-319-78890-6_7
Download citation
DOI: https://doi.org/10.1007/978-3-319-78890-6_7
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-78889-0
Online ISBN: 978-3-319-78890-6
eBook Packages: Computer ScienceComputer Science (R0)