Abstract
In this chapter, a new approximate circuit synthesis paradigm is presented, where approximations are introduced to the input circuit using Boolean matrix factorization (BMF). For a given multi-input, multi-output circuit, we first build its truth table and then approximate the truth table using BMF in a controllable fashion. The results of the BMF factorization are then used to synthesize the final approximate circuit. To scale our technique to large circuits, we devise a circuit decomposition method that breaks the circuit into manageable subcircuits. Furthermore, to effectively explore the design space of subcircuit approximations, a design space exploration technique is presented. Our approach offers a wide range of fine-grain trade-offs between accuracy and design complexity, i.e., design area and total power. We demonstrate that the proposed methodology can achieve large savings in power and area with small reductions in accuracy.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Cong J, Ding Y (1994) Flowmap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs. IEEE Trans CAD Integr Circuits Syst 13:1–12
Hashemi S, Bahar RI, Reda S (2015) Drum: a dynamic range unbiased multiplier for approximate applications. In: Proceedings of the IEEE/ACM international conference on computer-aided design, ICCAD ’15. IEEE Press, Piscataway, pp 418–425
Hu J, Qian W (2015) A new approximate adder with low relative error and correct sign calculation. In: 2015 design, automation test in Europe conference exhibition (DATE), pp 1449–1454
Imani M, Peroni D, Rosing T (2017) CFPU: configurable floating point multiplier for energy-efficient computing. In: Proceedings of the 54th annual design automation conference 2017, DAC ’17. ACM, New York, pp 76:1–76:6.
Kahng AB, Kang S (2012) Accuracy-configurable adder for approximate arithmetic designs. In: DAC design automation conference 2012, pp 820–825
Lee DD, Seung HS (1999) Learning the parts of objects by non-negative matrix factorization. Nature 401:788–791
Lee S, John LK, Gerstaluer A (2017) High-level synthesis of approximate hardware under joint precision and voltage scaling. In: Design, automation and test in Europe
Li C, Luo W, Sapatnekar SS, Hu J (2015) Joint precision optimization and high level synthesis for approximate computing. In: Design automation conference, pp 104:1–104:6
Liu W, Qian L, Wang C, Jiang H, Han J, Lombardi F (2017) Design of approximate radix-4 booth multipliers for error-tolerant computing. IEEE Trans Comput 66(8):1435–1441
Martinello O, Ribas RP, Marque F, Reis A (2010) Kl-cuts: a new approach for logic synthesis targeting multiple output blocks. In: Design automation test in Europe, pp 777–782
Miao J, Gerstlauer A, Orshansky M (2013) Approximate logic synthesis under general error magnitude and frequency constraints. In: Proceedings of the international conference on computer-aided design, pp 779–786
Miao J, Gerstlauer A, Orshansky M (2014) Multi-level approximate logic synthesis under general error constraints. In: International conference on computer-aided design, pp 504–510
Miettinen P, Vreeken J (2011) Model order selection for boolean matrix factorization. In: Proceedings of the 17th ACM SIGKDD international conference on Knowledge discovery and data mining, pp 51–59
Miettinen P, Vreeken J (2014) MDL4BMF: minimum description length for boolean matrix factorization. ACM Trans Knowl Discov Data 8(4):18:1–18:31
Nepal K, Li Y, Bahar RI, Reda S (2014) ABACUS: a technique for automated behavioral synthesis of approximate computing circuits. In: Design, automation and test in Europe, pp 1–6
Ranjan A, Raha A, Venkataramani S, Roy K, Raghunathan A (2014) ASLAN: synthesis of approximate sequential circuits. In: Design, automation & test in Europe conference, pp 1–6
Hashemi S, Tann H, Reda S, (2018) BLASYS: approximate logic synthesis using boolean matrix factorization. In: Design automation conference, pp 1–6
Venkataramani S, Sabne A, Kozhikkottu V, Roy K, Raghunathan A (2012) Salsa: systematic logic synthesis of approximate circuits. In: DAC design automation conference 2012, pp 796–801
Venkataramani S, Roy K, Raghunathan A (2013) Substitute-and-simplify: a unified design paradigm for approximate and quality configurable circuits. In: Design, automation and test in Europe, pp 1367–1372
Wolf C Yosys open synthesis suit. http://www.clifford.at/yosys/
Xu W, Liu X, Gong Y (2003) Document clustering based on non-negative matrix factorization. In: ACM SIGIR conference on research and development in information retrieval, pp 267–273
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Switzerland AG
About this chapter
Cite this chapter
Hashemi, S., Tann, H., Reda, S. (2019). Approximate Logic Synthesis Using Boolean Matrix Factorization. In: Reda, S., Shafique, M. (eds) Approximate Circuits. Springer, Cham. https://doi.org/10.1007/978-3-319-99322-5_7
Download citation
DOI: https://doi.org/10.1007/978-3-319-99322-5_7
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-99321-8
Online ISBN: 978-3-319-99322-5
eBook Packages: EngineeringEngineering (R0)