Skip to main content
Springer Nature Link
Log in

Quantum Circuit Optimization by Changing the Gate Order for 2D Nearest Neighbor Architectures

  • Conference paper
  • First Online:
Reversible Computation (RC 2018)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 11106))

Included in the following conference series:

  • 1207 Accesses

Abstract

This paper proposes a new approach to optimize the number of necessary SWAP gates when we perform a quantum circuit on a two-dimensional (2D) NNA. Our new idea is to change the order of quantum gates (if possible) so that each sub-circuit has only gates performing on adjacent qubits. For each sub-circuit, we utilize a SAT solver to find the best qubit placement such that the sub-circuit has only gates on adjacent qubits. Each sub-circuit may have a different qubit placement such that we do not need SWAP gates for the sub-circuit. Thus, we insert SWAP gates between two sub-circuits to change the qubit placement which is desirable for the following sub-circuit. To reduce the number of such SWAP gates between two sub-circuits, we utilize A* algorithm.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Similar content being viewed by others

References

  1. Bhattacharjee, D., Chattopadhyay, A.: Depth-optimal quantum circuit placement for arbitrary topologies. arXiv preprint arXiv:1703.08540 (2017)

  2. Chakrabarti, A., Sur-Kolay, S., Chaudhury, A.: Linear nearest neighbor synthesis of reversible circuits by graph partitioning. arXiv preprint arXiv:1112.0564 (2011)

  3. Farghadan, A., Mohammadzadeh, N.: Quantum circuit physical design flow for 2D nearest-neighbor architectures. Int. J. Circ. Theory Appl. 45(7), 989–1000 (2017)

    Article  Google Scholar 

  4. Goudarzi, H., Dousti, M.J., Shafaei, A., Pedram, M.: Design of a universal logic block for fault-tolerant realization of any logic operation in trapped-ion quantum circuits. Quantum Inf. Process. 13(5), 1267–1299 (2014)

    Article  MathSciNet  Google Scholar 

  5. Grover, L.K.: A fast quantum mechanical algorithm for database search. In: Proceedings of the Twenty-Eighth Annual ACM Symposium on Theory of Computing, pp. 212–219 (1996)

    Google Scholar 

  6. Hirata, Y., Nakanishi, M., Yamashita, S., Nakashima, Y.: An efficient conversion of quantum circuits to a linear nearest neighbor architecture. Quantum Info. Comput. 11(1), 142–166 (2011)

    MathSciNet  MATH  Google Scholar 

  7. Lin, C.C., Sur-Kolay, S., Jha, N.K.: PAQCS: physical design-aware fault-tolerant quantum circuit synthesis. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 23(7), 1221–1234 (2015)

    Article  Google Scholar 

  8. Lye, A., Wille, R., Drechsler, R.: Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits. In: 2015 20th Asia and South Pacific on Design Automation Conference (ASP-DAC), pp. 178–183. IEEE (2015)

    Google Scholar 

  9. Matsuo, A., Yamashita, S.: Changing the gate order for optimal LNN conversion. In: De Vos, A., Wille, R. (eds.) RC 2011. LNCS, vol. 7165, pp. 89–101. Springer, Heidelberg (2012). https://doi.org/10.1007/978-3-642-29517-1_8

    Chapter  Google Scholar 

  10. Perez-Delgado, C.A., Mosca, M., Cappellaro, P., Cory, D.G.: Single spin measurement using cellular automata techniques. Phys. Rev. Lett. 97(10), 100501 (2006)

    Article  Google Scholar 

  11. Rahman, M., Dueck, G.W.: Synthesis of linear nearest neighbor quantum circuits. arXiv preprint arXiv:1508.05430 (2015)

  12. Ruffinelli, D., Barán, B.: Linear nearest neighbor optimization in quantum circuits: a multiobjective perspective. Quantum Inf. Process. 16(9), 220 (2017)

    Article  MathSciNet  Google Scholar 

  13. Saeedi, M., Wille, R., Drechsler, R.: Synthesis of quantum circuits for linear nearest neighbor architectures. Quantum Inf. Process. 10(3), 355–377 (2011)

    Article  MathSciNet  Google Scholar 

  14. Shafaei, A., Saeedi, M., Pedram, M.: Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures. In: Proceedings of the 50th Annual Design Automation Conference, p. 41. ACM (2013)

    Google Scholar 

  15. Shafaei, A., Saeedi, M., Pedram, M.: Qubit placement to minimize communication overhead in 2D quantum architectures. In: 2014 19th Asia and South Pacific on Design Automation Conference (ASP-DAC), pp. 495–500. IEEE (2014)

    Google Scholar 

  16. Shor, P.W.: Polynomial-time algorithms for prime factorization and discrete logarithms on a quantum computer. SIAM J. Comput. 26(5), 1484–1509 (1997)

    Article  MathSciNet  Google Scholar 

  17. Wille, R., Keszocze, O., Walter, M., Rohrs, P., Chattopadhyay, A., Drechsler, R.: Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits. In: 2016 21st Asia and South Pacific on Design Automation Conference (ASP-DAC), pp. 292–297. IEEE (2016)

    Google Scholar 

  18. Wille, R., Lye, A., Drechsler, R.: Optimal SWAP gate insertion for nearest neighbor quantum circuits. In: 2014 19th Asia and South Pacific on Design Automation Conference (ASP-DAC), pp. 489–494. IEEE (2014)

    Google Scholar 

  19. Wille, R., Saeedi, M., Drechsler, R.: Synthesis of reversible functions beyond gate count and quantum cost. arXiv preprint arXiv:1004.4609 (2010)

  20. Zulehner, A., Paler, A., Wille, R.: An efficient mapping of quantum circuits to the IBM QX architectures. arXiv preprint arXiv:1712.04722 (2017)

Download references

Acknowledgments

This work was supported by JSPS KAKENHI Grant Number 15H01677, and by the Asahi Glass Foundation.

Author information

Authors and Affiliations

  1. College of Information Science and Engineering, Ritsumeikan University, 1-1-1 Noji Higashi, Kusatsu, Shiga, 525-8577, Japan

    Wakaki Hattori & Shigeru Yamashita

Authors
  1. Wakaki Hattori
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Shigeru Yamashita
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Wakaki Hattori .

Editor information

Editors and Affiliations

  1. University of Turku, Turku, Finland

    Jarkko Kari

  2. University of Leicester, Leicester, United Kingdom

    Irek Ulidowski

Rights and permissions

Reprints and permissions

Copyright information

© 2018 Springer Nature Switzerland AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Hattori, W., Yamashita, S. (2018). Quantum Circuit Optimization by Changing the Gate Order for 2D Nearest Neighbor Architectures. In: Kari, J., Ulidowski, I. (eds) Reversible Computation. RC 2018. Lecture Notes in Computer Science(), vol 11106. Springer, Cham. https://doi.org/10.1007/978-3-319-99498-7_16

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-99498-7_16

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-99497-0

  • Online ISBN: 978-3-319-99498-7

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics