Abstract
We formulate eccentricity computation for exponentially large graphs as a decision problem for Quantified Boolean Formulas (QBFs.) and demonstrate how the notion of eccentricity arises in the area of formal hardware verification. In practice, the QBFs obtained from the above formulation are difficult to solve because they span a huge Boolean space. We address this problem by proposing an eccentricity-preserving graph transformation that drastically reduces the Boolean search space by decreasing the number of variables in the generated formulas. Still, experimental analysis shows that the reduced formulas are unsolvable by state-of-the-art QBF solvers. Thus, we propose a novel SAT-based decision procedure optimized for these formulas. Despite exponential worst-case behavior of this procedure, we present encouraging experimental evidence showing its superiority to other public-domain solvers.
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References
Biere, A., Cimatti, A., Clarke, E.M., Fujita, M., Zhu, Y.: Symbolic Model Checking Using SAT Procedures instead of BDDs. In: Proceedings of the 36th Design Automation Conference (1999)
Biere, A., Cimatti, A., Clarke, E.M., Zhu, Y.: Symbolic Model Checking without BDDs. In: Cleaveland, W.R. (ed.) TACAS 1999. LNCS, vol. 1579, p. 193. Springer, Heidelberg (1999)
Bryant, R.E.: Graph-Based Algorithms for Boolean Function Manipulation. IEEE Transactions on Computers 35(8), 677–691 (1986)
Cherkassky, B.V., Goldberg, A.V., Radzik, T.: Shortest Paths Algorithms: Theory and Experimental Evaluation. In: SODA: ACM-SIAM Symposium on Discrete Algorithms (1993)
Labbe, M., Peeters, D., Thisse, J.-F.: Location on Networks. Handbooks in OR & MS, North-Holland, 551–624 (1995)
Burch, J.R., Clarke, E.M., Long, D.E., McMillan, K.L., Dill, D.L.: Symbolic Model Checking for Sequential Circuit Verification. IEEE Transactions on Computer-Aided Design of Integrated Circuits 13(4), 401–424 (1994)
Clarke, E.M., Emerson, E.A., Sistla, A.P.: Automatic Verification of Finite-state Concurrent Systems Using Temporal Logic Specifications. ACM Transactions on Programming Languages and Systems 8(2), 244–263 (1986)
Galperin, H., Wigderson, A.: Succinct Representations of Graphs. Information and Control 56 (1983)
Giunchiglia, E., Narizzano, M., Tacchella, A.: System Description: QuBE A System for Deciding Quantified Boolean Formulas Satisfiability. In: Proceedings of the International Joint Conference on Automated Reasoning (2001)
Gupta, A., Yang, Z., Ashar, P., Zhang, L., Malik, S.: Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs. In: Proceedings of the International Conference on Computer-Aided Design (2001)
Kroening, D., Strichman, O.: Efficient Computation of Recurrence Diameters. In: 4th International Conference on Verification, Model Checking, and Abstract Interpretation (2003)
Moskewicz, M., Madigan, C., Zhao, Y., Zhang, L., Malik, S.: Chaff: Engineering an Efficient SAT solver. In: Proceedings of the Design Automation Conference (2001)
Papadimitriou, C., Yannakakis, M.: A Note on Succinct Representations of Graphs. Information and Control, 71 (1986)
Plaisted, D.A., Biere, A., Zhu, Y.: A Satisfiability Procedure for Quantified Boolean Formulae. Discrete Applied Mathematics (submitted for publication)
Rintanen, J.: Improvements to the Evaluation of Quantified Boolean Formulae. In: Proceedings of the 16th International Joint Conference on Artificial Intelligence, August 1999, pp. 1192–1197 (1999)
Sheeran, M., Singh, S., Stalmarck, G.: Checking Safety Properties Using Induction and a SAT-solver. Formal Methods in Computer Aided Design (2000)
Zhang, L., Malik, S.: Conflict Driven Learning in a Quantified Boolean Satisfiability Solver. In: Proceedings of the International Conference on Computer Aided Design, ICCAD 2002 (2002)
Yen, C.-C., Chen, K.-C., Jou, J.-Y.: A Practical Approach to Cycle Bound Estimation for Property Checking. In: 11th IEEE/ACM International Workshop on Logic Synthesis, June 2002, pp. 149–154 (2002)
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Mneimneh, M., Sakallah, K. (2004). Computing Vertex Eccentricity in Exponentially Large Graphs: QBF Formulation and Solution. In: Giunchiglia, E., Tacchella, A. (eds) Theory and Applications of Satisfiability Testing. SAT 2003. Lecture Notes in Computer Science, vol 2919. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-24605-3_31
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DOI: https://doi.org/10.1007/978-3-540-24605-3_31
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