Skip to main content

A Hybrid Genetic Approach for Circuit Bipartitioning

  • Conference paper
Genetic and Evolutionary Computation – GECCO 2004 (GECCO 2004)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3103))

Included in the following conference series:

Abstract

We propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local optimization heuristic which is a modification of Fiduccia-Matheyses algorithm. Using well-known benchmarks (including ACM/SIGDA benchmarks), the combination of genetic algorithm and the local heuristic performed better than hMetis, a representative circuit partitioning algorithm.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Benchmark, http://vlsicad.cs.ucla.edu/~cheese/benchmarks.html

  2. Alpert, C.J., Kahng, A.B.: Recent directions in netlist partitioning: A survey. Integration: the VLSI Journal 19(1-2), 1–81 (1995)

    Article  MATH  Google Scholar 

  3. Battiti, R., Bertossi, A.: Greedy, prohibition, and reative heuristics for graph partitioning. IEEE Trans. on Computers 48(4), 361–385 (1999)

    Article  Google Scholar 

  4. Bui, T.N., Moon, B.R.: Genetic algorithm and graph partitioning. IEEE Trans. on Computers 45(7), 841–855 (1996)

    Article  MATH  MathSciNet  Google Scholar 

  5. Caldwell, E., Kahng, A.B., Markov, I.L.: Improved algorithms for hypergraph bipartitioning. In: Asia and South Pacific Design Automation Conference, pp. 661–666 (2000)

    Google Scholar 

  6. Cavicchio, D.: Adaptive Search Using Simulated Evolution. PhD thesis, University of Michigan, Ann Arbor, MI (1970)

    Google Scholar 

  7. Cohoon, J.P., Martin, W.N., Richards, D.S.: A multi-population genetic algorithm for solving the k-part on hyper-cubes. In: Fourth International Conference on Genetic Algorithms, pp. 244–248 (1991)

    Google Scholar 

  8. Collins, R., Jefferson, D.: Selection in massively parallel genetic algorithms. In: Fourth International Conference on Genetic Algorithms, pp. 249–256 (1991)

    Google Scholar 

  9. Cong, J., Lim, S.K.: Edge separability based circuit clustering with application to circuit partitioning. In: Asia and South Pacific Design Automation Conference, pp. 429–434 (2000)

    Google Scholar 

  10. Cong, J., Lim, S.K., Wu, C.: Performance driven multi-level and multiway partitioning with retiming. In: ACM/IEEE-CAS/EDAC Design Automation Conference, pp. 274–279 (2000)

    Google Scholar 

  11. Dell’Amico, M., Maffioli, F.: A new tabu search approach to the 0-1 equicut problem. In: Meta-Heuristics 1995: The State of the Art, pp. 361–377. Kluwer Academic Publishers, Dordrecht (1996)

    Google Scholar 

  12. Dutt, S., Deng, W.: A probability-based approach to VLSI circuit partitioning. In: Proc. Design Automation Conference, pp. 100–105 (1996)

    Google Scholar 

  13. Dutt, S., Deng, W.: VLSI circuit partitioning by cluster-removal using iterative improvement techniques. In: Proc. International Conference on Computer-Aided Design, pp. 194–200 (1996)

    Google Scholar 

  14. Fiduccia, C., Mattheyses, R.: A linear time heuristics for improving network partitions. In: 19th IEEE/ACM Design Automation Conference, pp. 175–181 (1982)

    Google Scholar 

  15. Fukunaga, S., Huang, J.H., Kahng, A.B.: On clustered kick moves for iterated-descent netlist partitioning. In: IEEE International Symposium on Circuits and Systems, vol. 4, pp. 496–499 (1996)

    Google Scholar 

  16. Garey, M., Johnson, D.S.: Computers and Intractability: A Guide to the Theory of NP-Completeness. Freeman, San Francisco (1979)

    MATH  Google Scholar 

  17. Harpal, M., Kishan, M., Chilukuri, M., Sanjay, R.: Genetic algorithms for graph partitioning and incremental graph partitioning. In: IEEE Proceedings of the Supercomputing, pp. 449–457 (1994)

    Google Scholar 

  18. Johnson, D.S., Aragon, C., McGeoch, L., Schevon, C.: Optimization by simulated annealing: An experimental evaluation. Operations Research 37, 865–892 (1989)

    Article  MATH  Google Scholar 

  19. Karypis, G., Aggarwal, R., Kumar, V., Shekhar, S.: Multilevel hypergraph partitioning: Application in VLSI domain. In: Proc. Design Automation Conference, pp. 526–529 (1997)

    Google Scholar 

  20. Kernighan, B., Lin, S.: An efficient heuristic procedure for partitioning graphs. Bell Systems Technical Journal 49, 291–307 (1970)

    Google Scholar 

  21. Kim, Y.H., Moon, B.R.: Lock-gain based graph partitioning. Journal of Heuristics 10(1), 37–57 (2004)

    Article  MATH  Google Scholar 

  22. Kirkpatrick, S., Gelatt Jr., C.D., Vecchi, M.P.: Optimization by simulated annealing. Science 220(4598), 671–680 (1983)

    Article  MathSciNet  Google Scholar 

  23. Krishnamurthy, B.: An improved min-cut algorithm for partitioning VLSI networks. IEEE Trans. on Computers 33, 438–446 (1984)

    Article  MATH  Google Scholar 

  24. Laszewski, G.: Intelligent structural operators for the k-way graph partitioning problem. In: Fourth International Conference on Genetic Algorithms, pp. 45–52 (1991)

    Google Scholar 

  25. Martin, O., Otto, S.W., Felten, E.W.: Large-step markov chains for the traveling salesman problem. Complex Systems 5, 299–326 (1991)

    MATH  MathSciNet  Google Scholar 

  26. Moscato, P.: On evolution, search, optimization, genetic algorithms and martial arts: Towards memetic algorithms. Technical Report C3P 826, Caltech Concurrent Computation Program (1989)

    Google Scholar 

  27. Rolland, E., Pirkul, H., Glover, F.: A tabu search for graph partitioning. Annals of Operations Research 63 (1996)

    Google Scholar 

  28. Saab, Y., Rao, V.: Stochastic evolution: A fast effective heuristic for some genetic layout problems. In: 27th IEEE/ACM Design Automation Conference, pp. 26–31 (1990)

    Google Scholar 

  29. Schweikert, D.G., Kernighan, B.W.: A proper model for the partitioning of electrical circuits. In: Proc. 9th Design Automation Workshop, pp. 57–62 (1972)

    Google Scholar 

  30. Steenbeek, G., Marchiori, E., Eiben, A.E.: Finding balanced graph bipartitions using a hybrid genetic algorithm. In: IEEE Conference on Evolutionary Computation, pp. 90–95 (1998)

    Google Scholar 

  31. Whitley, D., Kauth, J.: Genitor: A different genetic algorithm. In: Proceedings of Rocky Mountain Conference on Artificial Intelligence, pp. 118–130 (1988)

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2004 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Kim, JP., Kim, YH., Moon, BR. (2004). A Hybrid Genetic Approach for Circuit Bipartitioning. In: Deb, K. (eds) Genetic and Evolutionary Computation – GECCO 2004. GECCO 2004. Lecture Notes in Computer Science, vol 3103. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-24855-2_116

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-24855-2_116

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-22343-6

  • Online ISBN: 978-3-540-24855-2

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics