Abstract
An angle and radius constrained IIR filter design approach using modified Remez exchange algorithm and least squares algorithm is designed to avoid tight pole-crowding in pipelined filters, resulting in improved frequency responses and reduced coefficient sensitivities. Experimental results demonstrate that our proposed method leads to chip area reduction by 33% and low power by 45% against the conventional method.
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© 2004 Springer-Verlag Berlin Heidelberg
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Kim, DI., Bae, SH., Lee, M.MO., Chung, JG. (2004). Area Efficient and Low Power Pipelined IIR Filter Design for Intelligent Integrated Photonic System. In: Mammeri, Z., Lorenz, P. (eds) High Speed Networks and Multimedia Communications. HSNMC 2004. Lecture Notes in Computer Science, vol 3079. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-25969-5_77
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DOI: https://doi.org/10.1007/978-3-540-25969-5_77
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-22262-0
Online ISBN: 978-3-540-25969-5
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