Abstract
Echo Instructions have recently been introduced to allow embedded processors to provide runtime decompression of LZ77-compressed programs at a minimal hardware cost compared to other recent decompression schemes. As embedded architectures begin to adopt echo instructions, new compiler techniques will be required to perform the compression step. This paper describes a novel instruction selection algorithm that can be integrated into a retargetable compiler that targets such architectures. The algorithm uses pattern matching to identify repeated fragments of the compiler’s intermediate representation of a program. Identical program fragments are replaced with echo instructions, thereby compressing the program. The techniques presented here can easily be adapted to perform procedural abstraction, which replaces repeated program fragments with procedure calls rather than echo instructions.
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Brisk, P., Nahapetian, A., Sarrafzadeh, M. (2004). Instruction Selection for Compilers That Target Architectures with Echo Instructions. In: Schepers, H. (eds) Software and Compilers for Embedded Systems. SCOPES 2004. Lecture Notes in Computer Science, vol 3199. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30113-4_17
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DOI: https://doi.org/10.1007/978-3-540-30113-4_17
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