Abstract
A complete and transparent design flow targeted on FPGA components Virtex II and Virtex II Pro for multiuser detection in DS-CDMA wireless communication system is presented. The developed architectures are specific in order to exploit the modern technology of the programmable logic. The result of this work is modular, dedicated, specific and functional hardware architectures of an adaptive multiuser detector using a library of hard IP cores, optimized for these FPGA components, performing adaptive LMS filtering on normalized fixed-point complex signals. The developed architectures can be used as optimized cores to implement MUD function in a system-on-chip (SoC) for DS-CDMA wireless communication systems.
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© 2004 Springer-Verlag Berlin Heidelberg
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Ho, QT., Massicotte, D. (2004). FPGA Implementation of Adaptive Multiuser Detector for DS-CDMA Systems. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_107
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DOI: https://doi.org/10.1007/978-3-540-30117-2_107
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